Part Number: ADC3649
Other Parts Discussed in Thread: LMK04828, LMK04832,
Please route to e2e per CASE CS3167208
I need to synchronize multiple ADC devices vis-a-vis the SYSREF/GPIO0 pin of the ADC3649 using the CLKOut drivers of an LMK04832 IC. SInce the GPIO0 is a single-ended input with a 1.8V expected level (maximum input is DVDD18 + 0.2), this is a problem as the LVCMOS level from the CLKOut ports of the LMK chip are 3.3V - 0.1. Without using a level translator which adds prop delay, for each CLKOut used as a SYSREF, is there an easier way to do this? Section 9.2.2.2 of the ADC3649 says: In multi-channel systems the SYSREF signal can be generated using a LMK04828 or LMK04832 device. What interface circuit was intended here?
Could I use a LVCEPL mode for the CLKOuts used as SYSREF and wire it in a way to meet the single-ended requirements for the ADC3649's GPIO0 voltage ratings/thresholds? Or perhaps a simple resistor divider after configuring the LMK for LVCMOS?
What do you recommend here.
