Part Number: DDC112
Dear TI,
Does the DDC112 have any specific requirements on max/min rise and fall times of the CLK (we are running at 10MHZ). And do the same voltage thresholds apply as for the other digital pins (VIL < 0.8V and VIH> 4.0).
Do you have any data on the architecture of the digital pins? CMOS/TTL etc?
Regards,
Thomas
