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ADC32RF55: Overrange settings

Kei Kuwahara
Expert 8360 points

Part Number: ADC32RF55

Hello team,

I am confused regarding the overrange (OVR) setting for ADC32RF55.
I want to confirm how to set OVR on GPIO and clear them.

I couldn't find register address 0x383, 0x74 on datasheet register map.
Also 0x84 is register for JESD PLL setting.

Would it be possible to check the correct register setting for setting OVR on GPIO and clear them?

image.png

Best Regards,
Kei Kuwahara

  • 0
    TI__Expert 8360 points

    Hello team,

    Can anyone answer my question?

    Best Regards,
    Kei Kuwahara

  • +1 in reply to Kei Kuwahara
    TI__Mastermind 24180 points

    Hi Kei-san,

    There are many registers which are not documented for this device, such as the entire calibration sequence. It is more simple to provide customer with direct register example on how to configure the OVR like in the table above.

    This sequence above is pretty clear to set Channel A OVR onto GPIO1, and Channel B OVR onto GPIO2.

    To clear the OVR, you must be on the analog page, and perform the register writes to 0x74 and 0x84 as indicated. This action of setting bit 2 from high to low is what clears the OVR flag.

    If customer wants the flags to be non-sticky, and show realtime with OVR condition, then they should perform the last 2 register writes which turn OVR into a realtime condition so it can be monitored by FPGA and perform some front end gain adjustment.

    Thanks, Chase

  • 0 in reply to Chase W
    TI__Expert 8360 points

    Hi Chase-san,

    Thank you, understood!

    Best Regards,
    Kei Kuwahara