Part Number: TSW14J58EVM
Hi TI Data Converter Team,
I have purchased a TSW14J58EVM (Rev A10) and I am looking to perform custom FPGA development on the onboard Xilinx Kintex UltraScale+ (XCKU5P).
Instead of using HSDC Pro, I intend to develop my own Verilog/VHDL code to interface with the hardware directly. To ensure correct pin mapping and DDR4 configuration, I would like to request the Vivado Reference Design (Source Code) for this board.
Specifically, I need:
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The Constraints file (.xdc) defining the pinout for the FPGA, especially for the FMC+ connector, DDR4, and Clocks.
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The DDR4 MIG configuration parameters used on this board.
Could you please provide a secure link to download the reference firmware/project?
Thank you,
Kevin
