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DDS39RFS10: Device behavior

Part Number: DDS39RFS10
Other Parts Discussed in Thread: TRF1108-DAC39RFEVM, , DAC39RF10, DAC38RF82, DAC39RFS10, DDS39RFS12, DAC39RF12EVM

hello,

We are evaluating the DDS39RFS10 and for that we purchased the TRF1108-DAC39RFEVM.

Few question rise:

  1. The EVM has the DAC39RF10 device.
    We operate it in a single DDS mode.
    Are the results we get identical to what we would get if we were using the DDS39RFS10 device?
  2. We work in DDS mode.
    So, we don't use the JESD204 bus, thus don't need to follow any JESD204 requirememtns or constraints. In that manner, the DAC CLK is irrelevant.
    Now, we configure the NCO to output a specific frequency.
    If we externally change the DAC CLK , the output frequency obviously changes.
    Is another operation required, after changing the DAC CLK, for the device to continue outputting a signal?
  3. The EVM uses a heatsink and a small fan.
    When operating in DDS mode, one output (RFS version), aximum power consumption is 1.761W (10GSPS). We will work in 6GSPS.
    Are a heatsink and/or fan required?

thanks,

Gil

  • Hi Gil,

    1: Yes

    2: No

    3: It depends on your environment whether a heat sink and fan are required. I think it would be good practice to have some sort of thermal management on your board design.

    Regards,

    Rob

  • Thank you Rob.

    I want to rephrase my 2nd question, so I am sure you got my concern:

    In another RF DAC that we use, DAC38RF82, when you change DACCLK without additional configuration inputs and JESD204 clock updates (SYSREF), the device "hangs" and stops outputting a signal.

    This is understandable.

    We are using the DDS39RFS10 in DDS mode with the NCO, thus, I want to make sure that after changing the DAC CLK and other than configuring the correct values to get the frequency we need, no additional calibration and/or synchronization processes are required.

    thanks,

    Gil

  • Hi Gil,

    I understand your concern, the DDS version of the DAC39RFS10 does not have the JESD enabled, so therefore, it won't hang up when you change your sampling clock frequency. I would be best to purchase the EVM and try this out, as well as other features you might have questions about on the lab bench.

    Regards,

    Rob

  • Hi Rob,

    Thank you.

    On a matter of additive PN in the DDS39RFS10 (we have the TRF1108-DAC39RFEVM) and the DDS39RFS12, for Fo=997MHz, 10K offset, datasheet states:

    DDS39RFS10

    NRZ, 10.24GHz, -143dBc/Hz. Same value in DES2XL mode.

    NRZ, 7.5GHz, -142dBc/HZ. Same value in DES2XL mode.

    DDS39RFS12

    NRZ, 12GHz, -143dBc/Hz.

    DES2XL mode, 12GHz -148dBc/Hz, 8GHz -147dBc/Hz.

    My questions:

    1. Why is the RFS12 more superior than the RFS10 (6dB) in DES2XL mode? -148 in 8GHz versus -142 in 7.5GHz.

    2. Why does the additive PN improve as the sampling clock increases? (you can see it in both devices).

    3. Can you send the additive PN for the DDS39RFS12 in Fclk=6GHz? (setup as in the datasheet, p.23. DEM/Dither off, NRZ and DES2XL mode).

    6GHz is the frequency we intend to use in our design.

    4. Figure 8-5 (same on both datasheets) seems to relate to the DDS39RFS12 and not the RFS10.
    Do the DEM/Dither have the same effect for both devices, in NRZ and DES2XL modes?

    Thank you 

    Gil

  • Hi Gil,

    There is not a significant contribution from sampling rate to close-in phase noise.

    There is not a significant difference between the RF12 and RF10 DACs, this must be an error in the datasheet. These are the exact same devices, just different speed grades.

    DEM/DITHER will have the same effects in NRZ/DES2X modes, but DES2X will have better white noise floor.

    I will see if we have any PN at 6GHz FCLK. Stay tuned.

    Regards,

    Rob

  • Hi Rob,

    So, you say the additive PN of both devices, for the same Fclk, offset, mode, etc., is the same?

    Can you find and send the accurate additive PN in 10K offset for these devices (DES2X mode and NRZ mode)?

    So, it is not more advisable to use a higher Fclk for better additive PN?

    Thanks,

    Gol

  • Hi Gil,

    Yes, that is what I am saying for the first question.

    I will need to work on the second question. What signal output should we measure the PN for your application? and at 6GHz again?

    Please advise.

    Regards,

    Rob

  • Hi Rob,

    We'd appreciate the additive PN for 6GHz Fclk, NRZ and DESXL modes, 997MHZ Fout, with and without DEM/Dither.

    If the RFS12 and RFS10 behave the same in that manner,  a measurement on a device without a RF AMP is preferable (only a balun and a load on the dds output), so we don't see any effect from an external RF AMP.

    BTW, do you use a signal generator that has a superior PN in compare to the DDS39RFS, or you do calculate the additive PN such that the external clock contribution is subtracted out?

    A question on what you wrote earlier:

    You wrote "DEM/DITHER will have the same effects in NRZ/DES2X modes, but DES2X will have better white noise floor:

    According to figure 8-5, DEM/Dither have stronger effect in DES mode, but has a similar noise floor (additive PN in 10M and higher offsets).

    Thank you

    Gil

  • Hi Rob,

    Can you update on the above?

    In addition:

    Is there a way to run a script on the TRF1108-DAC39RFEVM?

    Can we bypass the GUI and control the EVM via Python or MATLAB using the USB-to-SPI interface (via a provided DLL)?

    thanks,

    Gil

  • Gil, 

    The latest version of the GUI for the DAC39RF12EVM has example scripts in Python to set things up. 

    Regards, 

    Matt

  • Hi Rob, Matt,

    With regard to the FR bus:

    It is powered by the VDDIO bus with typical voltage of 1.8V (1.71V to 1.89V).

    I consider using a device that might output a voltage that can reach 2.1V (typical 1.8V but might get  higher).

    So, I think of using a VDDIO voltage of 2V (abs max is 2.45V).

    And with a 2.1V voltage on FRCLK/FRDI/FRCS I will be on the safe side (abs max for these is VDDIO+0.3V).

    Do you see an issue here?

    In addition, with VDDIO=2V, will VIH and VIL still answer to 0.7*VDDIO(min) and 0.3*VDDIO(max), respectively?

    thanks,

    Gil