ADS1232: Linearity deteriorates at certain points

Hello Higa,

This is likely a noise issue that certain ADS1232 can exhibit near 0mV input voltage.  As a quick check, please ask the customer to add 1nF common mode capacitors from each of the CAP pins to ground.

Also, please provide lot/date code on ADC package.  A picture of the ADC top side that shows all markings will also work.

Thanks.

Regards,
Keith Nicholas
Precision ADC Applications

Hi Nicholas-san

Thank you for your reply.

I would like to request additional investigation regarding the addition of capacitors and seal information.

Could you please provide me with some information?

These questions need to be explained to the customer. Thank you for your cooperation in disclosing the information.

・Is the source of the noise PGA?

・Why does this noise increase around 0mV?

・When did this noise problem start? Is it from the time of released this device?

Best regards,

Higa

Hi Higa-san,

Please confirm with the customer if adding the capacitor corrects the measurement errors near 0mV.  I think this will likely correct the problem, but need confirmation.

1.  Yes, the suspected noise is due to the internal PGA.

2.  Again, if the addition of the capacitors corrects the issue, then the noise is most likely a result of a low-level oscillation near 0mV that shows up as an offset in the measurement.  Adding the 1nF capacitors eliminates the oscillation.  Input voltages greater than about +/-25% of full scale also eliminate the oscillation.  Adding the capacitors also creates a common mode filter, which can help lower measurement noise over the entire input range.

3.  No, this specific noise issue was not present on the original release of the device.  It only showed up later on a limited number of devices, and has since been corrected.  If the customer provides a picture of the ADC top side with all markings, we can determine if this material can have this issue.

Regards,
Keith

Hello Keith-san

The same phenomenon has occurred in multiple lots.

I have attached the package photo of the sample from which the data I sent the other day was obtained.

After adding a filter, some individuals showed improvement, while others showed little improvement.(please refer to below graph data)

Even after improvement, the error at G=128 is as large as 10ppm.

Other individuals show a few ppm.

Is this error within the range of variation?

Also, is there a way to correct this error?

I also have some additional questions.

a. When did you finish fixing the device?

    Could you tell me the lot number or date code of the completed device?

b. From now on, we will have to add C0G capacitors to all the boards we do mass production.

　This applies to devices that do not have any problems, but will it cause any new problems?

c. Is there any problem with C0G capacitors larger than 1 nF? (such as 10 nF) )

　Is there any particular capacity tolerance?

d. My customer uses ADS1231 and ADS1235.

　Should they also implement the same common mode capacitors?

Best regards,

Higa

Hello Higa-san,

The customer is showing 10ppm INL; I assume this is relative to the full-scale range of their load cell, which is +/-2mV/V, or 20mVpp (+2-(-2))*5 when using a 5V bridge excitation.  The typical INL specified for the ADS1232 is 4ppm, relative to an ADC full scale range of 39mVpp.  This implies the typical INL relative to the customer load cell is closer to 8ppm. [4ppm*39mV/20mV]

Using gain=128, we do not specify a maximum INL, but a good approximation will be 2x the typical, or in this case, 16ppm.  Based on the customer plot, the INL is within expected worse case tolerance.  However, the results do seem a bit higher than expected for the customer measurements.  This could be due to solder flux not completely cleaned from the board after modification.  You may want to suggest some additional board cleaning to remove as much solder flux and other board contaminants as possible.

a.  All material shipped starting in July 2025 has the fix.  The date code will be 57T or greater.  47T is older material that had this issue in a small percentage of devices.

b.  We did extensive testing and analysis with the older die material, and concluded adding the 1nF common mode capacitors did not have any negative effects.  In addition to fixing this linearity issue near 0V, the additional 1nF capacitors also provided additional common mode filtering for any external noise coupled into the ADC inputs.

c.  2% tolerance or better C0G/NP0 ceramic capacitors will work well.  No concerns with capacitor values up to 100nF, which is the recommended value for the CAP pins.  You can also use film capacitors, but these capacitors are typically much larger than the C0G/NP0 ceramic option.

d.  No concerns with ADS1231 or ADS1235.  The ADS1231 uses a different version of the PGA, and the ADS1235 is a completely different design and generation of device.  We do show using these common mode capacitors in the ADS1235 datasheet, but these are only used to filter external common mode noise that can possibly couple into the ADC inputs.  I would recommend adding these capacitors on the board design when possible, even if the capacitors are not populated, which adds some flexibility to the design if there are external noise issues in the system.

Regards,
Keith

Hi Keith-san

Thank you for your careful explanation.

I have one more question.

Regarding your explanation below, is it correct to understand that the error increases to 5/3. 3= about 1.5 times when AVDD becomes 3.3 V?

you said:

The customer is showing 10ppm INL; I assume this is relative to the full-scale range of their load cell, which is +/-2mV/V, or 20mVpp (+2-(-2))*5 when using a 5V bridge excitation.  The typical INL specified for the ADS1232 is 4ppm, relative to an ADC full scale range of 39mVpp.  This implies the typical INL relative to the customer load cell is closer to 8ppm. [4ppm*39mV/20mV]

Using gain=128, we do not specify a maximum INL, but a good approximation will be 2x the typical, or in this case, 16ppm.  Based on the customer plot, the INL is within expected worse case tolerance.  However, the results do seem a bit higher than expected for the customer measurements.  This could be due to solder flux not completely cleaned from the board after modification.  You may want to suggest some additional board cleaning to remove as much solder flux and other board contaminants as possible.

Best regards,

Higa

Hi Keith-san

Thank you for your reply and your kind support.

I have received another inquiry from my customer.

Regarding this PGA defect, is there any risk that the individual that did not have the defect will suddenly develop the same defect over time?

It would be very helpful if you could comment on the possibility.

My customer is concerned about the failure of the system running in the market.

Best regards,

Higa

Hello Kieth-san

Thank you for your kind support.

You've been very helpful. Thank you.

Best regards,

Higa