• State TI Thinks Resolved
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 46 subscribers
  • Views 35 views
  • Users 0 members are here
Support feedback
Options
Options
Related

DAC7565: DAC7565 Implementation

Parker Gray
Prodigy 110 points

Part Number: DAC7565

Hi,

 

I have multiple questions below regarding the DAC7565 device implementaion in a system.

 

1.   Are there any power sequencing requirements between AVDD and IOVDD?   For instance, can AVDD be powered while IOVDD is unpowered for a brief period of time, and vice versa?

 

2.   Is it OK for me to draw a small amount of current from VREF, around 10 uA?  Will the reference accuracy be affected by this?

 

3.   Is it possible to access all features of the part without using the LDAC pin?  

 

4.  The datasheet doesn't explain how to connect VREFL.  Can it just be connected to GND?

 

Thanks,

Parker Gray

  • 0
    TI__Genius 13560 points

    Hi Parker,

    1) The datasheet doesn't specify a power sequencing, which implies that there is no requirement. If you run into issues, general good practice is to perform a software reset (SPI command or pin) after turning on the device so the device powers up correctly.

    2) Yes, you can draw a small amount of current without a shift in reference voltage. You can use this plot to see how the reference changes over current load:

    3) Yes, you can use the synchronous DAC update mode to update the DAC output on the falling edge of SCLK cycle. Connect LDAC to GND in this case.

    4) Yes, connect VREFL to GND.

    Thanks,
    Erin