This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADC124S021: SPI Mode Issue

Part Number: ADC124S021

Hi,

I am using ADC124S021CIMMXNOPB on two identical PCBs with the same firmware, alongside an STPM33 on the same SPI bus (ATSAME70 MCU).

The SPI is configured as Mode 3 (CPOL=1, CPHA=1) since STPM33 requires it. According to a previous E2E thread, ADC124S021 should support both Mode 0 and Mode 3.

**Issue:**
On PCB1, everything works correctly with Mode 3.
On PCB2 with the same firmware and Mode 3, ADC124S021 returns exactly half the expected value (e.g., expected 0.28V, getting 0.14V). When I switch to Mode 0 on PCB2, the ADC124 starts working correctly but STPM33 stops working.

The half-value result suggests a 1-bit right shift in the data, which could indicate the null bit (bit 15) is being treated as D11, or the first clock edge is being missed.

**Questions:**
1. Can a hardware issue (e.g., cold solder joint on CS or MISO) cause this exact symptom of consistently half values in Mode 3?
2. Is there any known sensitivity of ADC124S021 to SCLK idle state (idle high in Mode 3) that could explain different behavior between two identical boards?
3. Is there anything in the ADC124S021 timing requirements for Mode 3 specifically (CS setup time, first clock edge) that we should verify?

**SPI config (ATSAME70):**
CPOL=1, NCPHA=0 (Mode 3), 8-bit, same CS and SPI lines for both devices.

Thank you.

  • Hello,

    I don't have any historical data to base my response on, but it should be possible to try and debug. Are you able to send any logic analyzer captures of the device in operation, and the described behavior? Maybe the SPI configuration could be adjusted, but yes, a 1-bit shift seems like the most likely issue that would cause the value to be half of the expected.

    Regards,
    Joel