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VSP5610: VSP5610RSHR — CMOS Output Mode & Full Register Map Request

Part Number: VSP5610

Dear TI Support,

We are currently designing a CIS-based imaging system using the VSP5610RSHR in 3-channel SH (CMOS sensor) mode, interfaced to an STM32H747 via an 8-bit parallel DCMI bus.

While reviewing the public datasheet (SBES021), we were unable to find detailed information regarding:

1) CMOS 8-bit output mode pin assignment (CK0 / D6 / TCLK+ multiplexing)
2) Output pixel clock source and timing relationship to D[7:0]
3) Channel multiplexing scheme on the parallel bus in 3-channel mode

Additionally, the datasheet references a register map that does not appear in the public document.

Could you please provide:
- The complete register map (SPI programming guide)
- Detailed CMOS output timing diagrams
- Any application note covering parallel CMOS mode

This information is required to finalize our hardware design.

Thank you in advance.

Best regards,

Patrick Reybaud - CTO

DEVISUBOX