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DAC63004: Linear and Logarithmic-Slew Mode

Tomasz Jastrzebski
Intellectual 413 points

Part Number: DAC63004

Hi TI,

DAC63004 specs section 7.4.5.1.2 Programmable Slew-Rate Control reads:

"The slew rate control feature allows the user to control the rate at which the output voltage (VOUT) changes. When this feature is enabled (using the SLEW-RATE-X[3:0] bits), the DAC output changes from the current code to the code in the DAC-X-MARGIN-HIGH or DAC-X-MARGIN-LOW registers"

Do I understand correctly that Linear Slew Mode and Logarithmic Slew Mode work only when the output is being enabled or disabled, and the output value changes to either margin-low or margin-high? In other words, is it true that these modes do not apply when I change the nominal output value by modifying the DAC-X-DATA register?

Needless to say, by modifying the DAC-X-DATA register I can achieve any slew rate in firmware. However, I was hoping this could be done automatically by the DAC, without sending many extra bits and keeping the MCU busy.

Thanks,

Thomas

  • +1
    TI__Mastermind 18530 points

    Hi Thomas,

    Correct, the slew mode only applies to the margining and function generation. The DAC-X-DATA register will update the DAC output immediately. While a bit more finicky, you can use the margin high/low registers to update your DAC value with your desired slew rate. For example, let's say you have a DAC output of 0x100. You can set your Margin Low value to 0x100, trigger margin low, then set your margin high value to whatever new value you desire (example, 0x800). Then you trigger the margin high command and the DAC will slew to that value. It's 4 commands, but that's better than writing each specific DAC step.

    Thanks,
    Erin

  • 0 in reply to Erin Bowrie
    Intellectual 413 points

    Hi Erin,

    Thanks for providing this solution - it should work perfectly!

    Kind regards,
    Thomas