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ADS8354: MIN AVDD requirement with ±2 x VREF range and internal reference

Sebastian Ausserwoeger
Prodigy 230 points

Part Number: ADS8354
Other Parts Discussed in Thread: THS4521,

Hi,

we want to use the ADS8354, driven by the THS4521 for one of our upcoming projects (similar to the typical application diagram in the ADS8354 datasheet - see below).

image.png

 

The circuit configuration shall be as follows:

  • ADS8354 configured to ±2 x VREF range with internal reference.
  • AVDD of ADS8354 and THS4521 supplied from a single 5V voltage source.
  • VOCM pin of THS4521 overdriven by a buffer which is connected to ADS8454's REFIO_x pin, in order to set common mode input voltage mid-way of FSR.

As is stated in the electrical characteristics section of the ADS8354 datasheet (see below), it seems logic that AVDD needs to be at least 5.0V, while VREF is set to the maximum value of 2.5V (REFDAC_x = 1FFh), in order use the full-scale input range.

image.png

 

Now, the actual questions regarding this topic are:

  1. What happens if the MIN AVDD requirement is not met? Let's assume AVDD drops to 4.95V (for example due to inherent tolerances or load/line transients of the 5V supply). Will there "just" be a clipping of the maximum input voltage range or are there any other "more severe" effects like gain errors, etc.?
  2. Can the MIN AVDD requirement be relaxed by setting the internal reference voltage to a lower value - for example to 2.40V, which would result in a MIN AVDD requirement of only 4.80V? Or is MIN AVDD independent of the actual VREF setting?

 

Thanks in advance for your help.

Best regards,

Sebastian

  • +1
    TI__Expert 7510 points

    Hello Sebastian, 

    Sebastian Ausserwoeger said:
    What happens if the MIN AVDD requirement is not met? Let's assume AVDD drops to 4.95V (for example due to inherent tolerances or load/line transients of the 5V supply). Will there "just" be a clipping of the maximum input voltage range or are there any other "more severe" effects like gain errors, etc.?

    When AVDD<VREF*2 there would definitely create early saturation/clipping near full scale. This could in turn affect the overall gain error and linearity of the device, if the dip is small enough it could be minimal, but it would also go beyond the recommended use parameters. 

    Sebastian Ausserwoeger said:
    Can the MIN AVDD requirement be relaxed by setting the internal reference voltage to a lower value - for example to 2.40V, which would result in a MIN AVDD requirement of only 4.80V? Or is MIN AVDD independent of the actual VREF setting?

     Ideally yes, if it were in a stable environment close to room temperature.  The internal references have some variance, between each other, depending on temperature, and device to device. With that in mind, this particular reference (at 0x1FF) is 2.5V±5mV at room + 10ppm/C drift over temperature which is about an additional ±2.5mV over the temperature range this device is rated for. So if in a stable environment at room, and the VREF is set to 2.4V I would recommend keeping AVDD>4.9V.  Or measuring VREFIO, and ensuring AVDD is at least (VEFIO+2.5mv)x2.  If there is a change of temperature expected or more extreme temperatures, then I would stick to 5V min. 

    The limits in the Electrical Characteristics table take into consideration such variance and unless otherwise noted, they encompass the temperature range as well.  So even with the internal DAC set to 2.5V having AVDD be at least 5V will ensure full performance over temperature.

    Best regards, 

    Yolanda

  • 0 in reply to Yolanda Gonzalez
    Prodigy 230 points

    Hello Yolanda,

    thank you for the useful information.

    The VREF=2.40V was just an example to make the question a little easier to ask. My key takeaway from your comment is that we can relax the MIN AVDD requirement by lowering VREF as long as we take all variations of VREF (and the 5V supply of course) into consideration and assure that VDDA >= VREF is met at all times. That's what I assumed beforehand, but it's very reassuring that there is no other electrical "necessity" to keep AVDD above 5V all the time, regardless of the VREF setpoint.

    Best regards,

    Sebastian

  • 0 in reply to Sebastian Ausserwoeger
    TI__Expert 7510 points

    Hello Sebastian, 

    Thank you for the response. 

    Yes, my comment confirms that, when the range is set to VREF*2, keeping AVDD>=VREF*2 would be the minimum requirement. I would still recommend not to lower the AVDD below 4.5V, since this is the limit for the device when the range is set to VREF*1 

    Best regards, 

    Yolanda 

  • 0 in reply to Yolanda Gonzalez
    Prodigy 230 points

    We will keep that in mind. Appreciate it.