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ADS131M03: SPI configuration

Oscar Liborio
Intellectual 1540 points

Part Number: ADS131M03

Hello,

 

My costumer has some trouble configuring the ADC can you please look into his question and provide feedback?:

Details:ADS131M03_config.c ADS131M03 SPI Coms Disabled; 85µs DRDY rate; 2026-04-15_0_091027.png

  • I'm having trouble configuring the ADC using the SPI protocol – specifically trying to adjust the sampling rate. The default period for the DRDY pin triggering is ~85µs (refer to "ADS131M03 SPI Coms Disabled..." image) but I'd like to change it to be as close to 250µs as possible. 
  • Perhaps I'm just not sending the data frames correctly to the ADC. I've attached a file ADS131M03_config.c which shows the current command structure I'm using to configure the device.
  • Any instructions or advice on how to robustly send and receive SPI commands to the ADC would be greatly appreciated. 

 

Thanks,

Oscar

  • 0
    TI__Mastermind 49425 points

    Hi Oscar,

    Please see the questions and suggestions below.

    • What's the main clock frequency?  If 8.192MHz is used for high resolution mode, the default data rate is 4ksps with the default 1024 OSR, the customer should be able to see 250us period time on the /DRDY signal.
    • It seems like the customer wanted to use turbo mode by setting TBM bit to 1b, I would suggest the customer to set other OSR for test purpose, for example, they can write 0x0812 to the CLOCK register for setting the OSR to 2048. Please provide a scope shot of /CS, SCLK, DIN, DOUT and /DRDY all at the same time, and also check the period time of the /DRDY before and after the WREG command is send to the ADC.

    Best regards,

    Dale