Part Number: ADS9324
Hi,
I have 2 questions.
- SPI interface sharing at several devices
- is below connection available?
- FPGA has dedicated pin for CS and SDO for each devices
- FPGA has 2 pins for SCLK and SDI and it's shared for each devices.
- CONVST
- When CONVST is low, is data sampled at previous sampling results?
- after CONVST high, is data sampled at current sampling results?
- Customer has to get current sample so when they try to get the data, doing 2 times sampling. removed first data and get next data.
- if CONVST high mean giving current data, then customer would like to do 1 time sampling and with CONVST high, they would get the data.
Thanks.
