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ADC3660: ADC3660 Analog Input Reading Incorrect

Part Number: ADC3660

Hi TI team,

I am currently using ADC3660 and encountered an issue where the digital output code does not match the expected value.

I am using an FPGA to capture the digital output from the ADC.
I have already verified the digital interface by enabling the ramp pattern mode, and the FPGA can correctly decode the incrementing digital pattern. Therefore, I believe the digital interface timing and FPGA decoding are working properly.

For the analog input test:

  • AINP = 0.95V
  • AINN = 0.95V

Based on my understanding, the ADC output should be close to mid-scale (around 32768 for 16-bit output). However, the actual captured value is only around 21636, which seems unreasonable.

I would like TI to help review whether there may be any issue in the schematic or analog front-end design.

However, due to confidentiality concerns, I cannot upload the schematic publicly on E2E.
Would it be possible to share the schematic through a private review method for checking? 

The following are my software settings.

# System setting

    # 16-bit 2-wire

    # CLKP: 20MHz, DCLK: 80MHz

    # use internal voltage reference

    # single-ended clk input

    # differential analog data input

    # output format: offset binary

 

# CMD format:

# spi_write reg_addr reg_HEXvalue

 

#step0: reset

spi_write 00 01

sleep 0.001

#step1: select the output interface bit mapping

spi_write 07 4B

#step2: use E-fuse

spi_write 13 01

sleep 0.001

spi_write 13 00

#step3: set CMOS output buffer   

spi_write 0A 7F

spi_write 0B EE

spi_write 0C FC

#step4: enable DCLK i/o buffer   

spi_write 18 10

#step5: set FCLK               

spi_write 19 12

#step6: set resolution to 16bit   

spi_write 1B 88

#step7: set DCLK               

spi_write 1F 50

#step8: set FCLK duty cycle(default setting)

spi_write 20 00

spi_write 21 FC

spi_write 22 0F

 

# set voltage ref and clk input type

spi_write 0E 09

# DLL PDN on

spi_write 11 04

# enable digital features block

spi_write 24 04

sleep 0.001

# change chnnel A/B data format to offset binary

spi_write 8F 02    # change A ch data format from signed to unsigned

spi_write 92 02    # change B ch data format from signed to unsigned

 

 

Thanks.