• State TI Thinks Resolved
  • Locked Locked
  • Replies 7 replies
  • Answers 1 answer
  • Subscribers 48 subscribers
  • Views 179 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AFE20408: OUTAx, OUTBx output waveform overshoot

Takashi Imai
Intellectual 390 points

Part Number: AFE20408

Hello,

There is a question from my customer about the overshoot which they observed on OUTAx and OUTBx output.  Since I got those waveforms from the customer, I would like to share it with you.

The customer asked us if the overshoot that was identified is something that occurs as the IC, and if there is any way to reduce the level of overshoot.

It is appreciated your cooperation in answering the customer.

Best & Regards,

T.Imai

  • 0
    TI__Guru 56923 points

    Hi Imai-san,

    Can you share the images? Note that the device uses capacitive charge-sharing to achieve fast switching on the OUT pin.  parasitic characteristics like trace and package inductance can contribute to overshoot.  In addition, the switching speed is very high, so sometimes oscilloscope add overshoot if the probe is not properly compensated.  The image of the switching would help confirm this behavior.

    If the overshoot is real (and not caused by scope), then adding a small resistance in series with the bulk capacitor (~1Ω) can help reduce overshoot.

    Thanks

    Paul

  • 0 in reply to Paul_Frost
    Intellectual 390 points

    Hi Paul-san,

    I got the images from the customer. Since the images are the customer's data, I would like to share them with you privately, not openly in this E2E. Is this posssible? The customer has agreed to share them with you.

    Thanks & Regards,
    T.Imai

  • 0 in reply to Takashi Imai
    TI__Genius 17300 points

    Hi Imai-san,

    Please email the images to frost@ti.com and e-bowrie@ti.com. 

    Thanks,
    Erin

  • 0 in reply to Erin Bowrie
    Intellectual 390 points

    Hi Erin-san,

    Thank you for your reply. I sent the images by email now. Please check it. I am looking forward hearing your comment soon.

    Best Regads,

    T.Imai

  • 0 in reply to Takashi Imai
    Intellectual 390 points

    Hi Erin-san,

    Thank you for your support. I sent you an email, but you asked me to post it on E2E because you are out until 6/12. I need your reply to below questions.

    Here is a new question from the customer about AFE20408.

    The customer connected the OUTA of the AFE20408 to the gate terminal of the GaN Power Amplifier to try to control its gate voltage.

    If the GaN Power Amp. is not connected to the AFE20408 as shown in the attachment, OUTA0 output voltage is -5V ⇔ -2.5 V, but if the gate of the GaN Power Amp. is connected, the waveform will be distorted.

    According to the application notes, OUTA0 is directly connected to the Power Amp., so the customer didn't add any component between OUTA0 and the gate terminal.

    What is the cause of the distortion?  How can they do about it?

    AFE20408 OUTA waveform.pdf

    And, could you please reply to the customer’s previous question?  I asked about this by e-mail because it indcluded the customer information, but the question doesn't need to include customer's information, so I write it below. Please answer this as well.

    "I received the following questions after I told replied to customer. Please help me answer them. 

    1)When the period of DRVEN0 high is 0.5us as shown in the data sheet, we have confirmed that the output waveform is similar to the data sheet.
       However, when the period of DRVEN0 high is about 100us, there is an overshoot when the output rises. It seems the behavior of the overshoot
       at the start differs depending on the period when DRVEN0 is high. Is this understanding correct?

    2) I understand that the overshoot when the output falls is caused by the IC.  In AMP ICs such as GaN HEMTs, the drain current increases
         significantly when the gate voltage increases by about 200mV.  Does TI think this overshoot is not a problem as a bias controller? "

    Best Regards,

    T.Imai

  • 0 in reply to Takashi Imai
    TI__Genius 17300 points

    Hi Imai-san,

    I followed up in the email. I'll close this thread for now.

    Thanks,
    Erin

  • 0 in reply to Erin Bowrie
    Intellectual 390 points

     Hi Erin-san,

    ok, please continue to talk in the email.

    Thank you,
    T.Imai