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ADS1256: Data adquisition problems

Part Number: ADS1256

Hello, 

I have a problem with the data adquisition from the ADS1256, any help is very apreciated. 

Relevant information: 

  • The ADC is controlled using an FPGA Cyclone II EP2C5T144C8 communicated to the computer using the FT232BL at 2MBR.
  • The test signals used to verify the performance are presented in the figures.
  • The ADC is set to 30ksp with a coninuos  adquisition (RDATAC command).
  • The channels used for data adquisition are AN0P y AN1N (set by default as datasheet says)

For any reason, the converter (or FPGA, or serial communication) sends grong samples and I do not know what the cause is. 

I hope anyone may have the solution for the problem or any advice. 

Captura de pantalla 2026-05-27 100734.png

 

Captura de pantalla 2026-05-27 101012.png

Captura de pantalla 2026-05-27 101409.png

 

  • Hi Jose de Jesus Colin Robles

    I am not sure what the y-axis is in your plots (ADC codes?), but in all cases the "bad" samples are dropping to 0

    Can you provide us the raw ADC codes in hex for the last plot (the pure DC input), as well as logic analyzer captures of the communication so we can review?

    -Bryan

  • Hello Bryan thanks for your reply. 

    The problem was in the final by receibed from the ADC where it is needed a time delay (y-axis is the ADC sample in 24bit signed integer value)

    Data adquisition problem is solved as it can be seen:

    In the same context, I am now trying to cicle the input multiplexer as datasheet says and  I am proposing the following time diagram: 

    Please may you validate this timing scheme for a proper operation? I would appreciate any suggestion.

    Best regards 

    Jesús Colín R.

  • Hi Jose de Jesus Colin Robles

    I am glad you figured out your first issue

    Below is the timing table from the ADS1256 datasheet. I believe this is what you are referencing. This aligns well with your image based on the times t6 and t11 

    -Bryan