Part Number: AFE4960P
Hello,
I am developing firmware for the AFE4960P using an nRF52832 MCU and implementing a 3-lead ECG application.
My plan is to first bring up and validate a single ECG channel and then extend the implementation to use both ECG channels for the complete 3-lead ECG solution.
I understand from the datasheet that:
- The ADC output is stored as 24-bit words.
- The ADC result is represented in 22-bit two's complement format.
- The device contains a 128-sample FIFO.
- Each FIFO sample corresponds to a 3-byte ADC word.
However, I am unable to determine how the FIFO data is organized for different ECG configurations.
Could you please clarify the FIFO structure for the following cases?
- Single-channel ECG
- If only ECG Channel 1 is enabled, what is the FIFO sequence?
- Will the FIFO contain only ECG1 samples as consecutive 24-bit words?
- Two-channel ECG
- If both ECG Channel 1 and ECG Channel 2 are enabled, what is the FIFO ordering?
- For example, is the FIFO organized as:
ECG1(n), ECG2(n), ECG1(n+1), ECG2(n+1), ... - Or is a different arrangement used?
- Channel Identification
- Is there any tag, status bit, or register information that identifies which channel a FIFO word belongs to?
- Or is the FIFO ordering entirely determined by the timing-engine configuration?
If there is an application note, example code, or datasheet section describing the FIFO word mapping for ECG applications, I would appreciate a reference.
Thank you for your support.
