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ADS8326: Regarding DCLOCK issue

Yuta Nishie
Genius 5800 points

Part Number: ADS8326

Hi,

I received argent inquiries from our customer in the following.  

Could you confirm regarding these inquiries?

1. Potential risk of exceeding the specified limit (6 MHz input)

 If a 6 MHz DCLK exceeding the specified limit (4.8 MHz) is input in a VDD=3.3 V environment, is there a risk of any defects (Missing data, loss of accuracy, etc.) occurring in the internal operation of the ADC?

Also, is there a risk that such defects will become apparent in the future due to changes in environmental temperature or the lapse of operating time?

2. Risk of IC failure If operation with a clock exceeding the timing specification is continued, is there a risk that the internal of the IC will deteriorate and Is there a risk that it will eventually break down? 

Best regards,

Nishie

  • 0
    TI__Expert 7470 points

    Hello Nishie, 

    This is a very interesting question, thank you for brining this up. 

    Yes, using the device over the DCLK limits could cause defects in the data out, like missing data, loss of accuracy, or just bad data in general. The ADC might not be able to register the clock transitions in time to be able to accurately output data as well as limiting the acquisition and conversion time, possibly putting the device in an unstable state. 

    Temperature will likely shift timing and affect further. 

    Using the device outside of the recommended operating conditions is not recommended. 

    Extended use in this mode could cause data out instability, but it should not damage to the internal IC

    Best regards, 

    Yolanda