ADS5296A: ADS 5296 - error in test dc value

Part Number: ADS5296A
Other Parts Discussed in Thread: DAC60508, THS4541, LMK1D1212

Hi,

 

After deep dive investigation I found strange phenomena on the ADS5296A.

 

We test dc value in few values on all channel with 100 samples and check Repetitiveness.

We except delta for 0-2 bit (one bit = 2mv).

 

We have card with few channels which fail the test.

 

The failure in the test depend on the input dc values.

There are values that all channels pass the test.

 

The failed channel has two results: 

  1. good result which change with small DC addition
  2. bad result which didn't change with small DC addition. (stay fix)

 

in same point of changing the dc input values, the bad result disappear and could start again with different dc value.

bad result could be different between channels.

 

 


Zeev Gerber
 

see the test result we run on all channels 20 time per channel.

10%-20% from the sample have problem in the problematic channels.

when we have failure the sample LSB is A for specific channels or C for other  specific channels

 

answers:


1. we are working with 10 bit mode.

2. delta 10 = 10 lsb = 20 mv 

3. 10 bit mode -> 2vpp -> 2mv per bit

4. we make dc swing on all the range and check every 16 bits in 12 bits dac. -> each step should be around 4 lsb of the adc.

5. delta of 10 = 10 lsb

6. the dac is dac60508 of TI and supply the simulation dc to all 64 channel of the adc. most of the ADC channel is working as expected.

 

  • Hi Zeev,

    Thanks for sharing the details. I would also like to understand the following:

    1. You mentioned that some channels are showing the missing codes problem. May I know out of 64 channels, how many channels show the problem?

    2. You mentioned that there are some channels for which even if you add small DC voltage, they will consistently show the problem. Does it mean that if you if do this 20 times, all the times you will see delta of 9/10 or do you see that the expected value should be 0xx66 and you always get higher value 06a or 0x6c? This question is necessary to understand how repeatable this problem is. Do the missing codes occur always, or do they show shift over time?

    3. We would also like to see the plot of the ADC output code/value (plot in Y-axis) with sweeping DAC DC voltage (X-axis). Is this plot repeatable in 20 runs? 

    4. Do you always give fixed input DC voltage in your application, or it may be any DC voltage? 

    If it is a missing code problem for a fixed DC voltage value, based on your application can you consider giving some other fixed DC voltage for which you don't run into missing codes problem and compensate it in the final output value? 

  • Hi,

    1. we have 64 channels in card and check three cards.

        the test run 20 time on each dc input and delta bigger then 2 is consider error

        card #1 have 5 defective channels. (2 ADC)

        card #2 have 1 defective channels.

        card #3  have 0 defective channels

    2. we run 20 time in each dc inputs and the error in most cases are 10%-20% of the samples. the other samples are O.K

        when we have error the value is show higher value.

        the step we run is ~4 LSB, and when we see high delta (10 for example) in the next step we will get delta of 6.

    3. the 20 runs are 20 Followers sample for the dame channel with the same dc input.

        the errors are usually repeatable in the next test.

    4. in my application I measure ballistic events. the test is to test the system noise and the functionality of the ADC. 

    5. I need the ADC to work properly in all the range of 0-2V.

  • do you get the last massege?

  • Hi Zeev,

    Thanks for the information. I received your last message. One more thing we want to understand from you is: if you sweep the DC input voltage from 0 to 2V, do you see the missing code issue occurring in some systematic way for these channels? For example, do you see the issue in bad channels occur periodically across DC input voltage sweep. Does it occur for let's say DC input of 100mV, then 200mV then 300mV and so on?

  • Hi,

    the problem occur randomly.

    could happened one time or more for each problematic channel.

    there are no fix voltage between the problematic places.

  • Hi,

    probably the issue is ADC Code-Transition Anomalies.

    ADC analog pins:

       ADC channel inputs are drive by THS4541 and the component and connection was approved by TI specialist from amplifier forum.

       ADC analog power supply have dedicated LDO with low ripple PS.

      We use internal reference and I also put capacitor on the reference pins.

      ADC input clock have dedicated clock came from LVDS driver (LMK1d1212). the clock pass common mode choke (DLW21SN900HQ2 - used for LVDS) and    have 100 ohm termination and ac couple capacitors (100nf).

    regards

    zeev gerber

  • Hi,

    I send you the test result of one cards.

    look on CH61 at ox390,0x290,0x190,0x90.

    it's show the problem occur in fix delta values in this channel.

    it's happened in the same places in few following tests.

    ========== start DAB testing =========
    ===========================================
    write port 0x1000, 0x400
    read port 0x1000
    port 0x1000 = 0x400 (1024)
    write port 0x1054, 0x5D0
    write port 0x1058, 0xba0
    write port 0x105C, 0x0
    write port 0x10a4, 0x0
    write port 0x10a8, 0xc0
    write port 0x10ac, 0x80
    write port 0x10b0, 0x8
    write port 0x2c18, 0x8108
    write port 0x2c58, 0x8108
    write port 0x2c98, 0x8108
    write port 0x2cd8, 0x8108
    write port 0x2d18, 0x8108
    write port 0x2d58, 0x8108
    write port 0x2d98, 0x8108
    write port 0x2dd8, 0x8108
    read port 0x104c
    port 0x104c = 0x800 (2048)
    read port 0x104c
    port 0x104c = 0x7f0 (2032)
    read port 0x104c
    port 0x104c = 0x7e0 (2016)
    read port 0x104c
    port 0x104c = 0x7d0 (2000)
    read port 0x104c
    port 0x104c = 0x7c0 (1984)
    read port 0x104c
    port 0x104c = 0x7b0 (1968)
    read port 0x104c
    port 0x104c = 0x7a0 (1952)
    read port 0x104c
    port 0x104c = 0x790 (1936)
    read port 0x104c
    port 0x104c = 0x780 (1920)
    read port 0x104c
    port 0x104c = 0x770 (1904)
    read port 0x104c
    port 0x104c = 0x760 (1888)
    read port 0x104c
    port 0x104c = 0x750 (1872)
    read port 0x104c
    port 0x104c = 0x740 (1856)
    read port 0x104c
    port 0x104c = 0x730 (1840)
    read port 0x104c
    port 0x104c = 0x720 (1824)
    read port 0x104c
    port 0x104c = 0x710 (1808)
    read port 0x104c
    port 0x104c = 0x700 (1792)
    read port 0x104c
    port 0x104c = 0x6f0 (1776)
    read port 0x104c
    port 0x104c = 0x6e0 (1760)
    read port 0x104c
    port 0x104c = 0x6d0 (1744)
    read port 0x104c
    port 0x104c = 0x6c0 (1728)
    read port 0x104c
    port 0x104c = 0x6b0 (1712)
    read port 0x104c
    port 0x104c = 0x6a0 (1696)
    read port 0x104c
    port 0x104c = 0x690 (1680)
    read port 0x104c
    port 0x104c = 0x680 (1664)
    read port 0x104c
    port 0x104c = 0x670 (1648)
    read port 0x104c
    port 0x104c = 0x660 (1632)
    read port 0x104c
    port 0x104c = 0x650 (1616)
    read port 0x104c
    port 0x104c = 0x640 (1600)
    read port 0x104c
    port 0x104c = 0x630 (1584)
    read port 0x104c
    port 0x104c = 0x620 (1568)
    read port 0x104c
    port 0x104c = 0x610 (1552)
    read port 0x104c
    port 0x104c = 0x600 (1536)
    read port 0x104c
    port 0x104c = 0x5f0 (1520)
    read port 0x104c
    port 0x104c = 0x5e0 (1504)
    read port 0x104c
    port 0x104c = 0x5d0 (1488)
    read port 0x104c
    port 0x104c = 0x5c0 (1472)
    read port 0x104c
    port 0x104c = 0x5b0 (1456)
    read port 0x104c
    port 0x104c = 0x5a0 (1440)
    read port 0x104c
    port 0x104c = 0x590 (1424)
    read port 0x104c
    port 0x104c = 0x580 (1408)
    read port 0x104c
    port 0x104c = 0x570 (1392)
    read port 0x104c
    port 0x104c = 0x560 (1376)
    read port 0x104c
    port 0x104c = 0x550 (1360)
    read port 0x104c
    port 0x104c = 0x540 (1344)
    read port 0x104c
    port 0x104c = 0x530 (1328)
    read port 0x104c
    port 0x104c = 0x520 (1312)
    read port 0x104c
    port 0x104c = 0x510 (1296)
    read port 0x104c
    port 0x104c = 0x500 (1280)
    read port 0x104c
    port 0x104c = 0x4f0 (1264)
    read port 0x104c
    port 0x104c = 0x4e0 (1248)
    read port 0x104c
    port 0x104c = 0x4d0 (1232)
    read port 0x104c
    port 0x104c = 0x4c0 (1216)
    read port 0x104c
    port 0x104c = 0x4b0 (1200)
    read port 0x104c
    port 0x104c = 0x4a0 (1184)
    read port 0x104c
    port 0x104c = 0x490 (1168)
    read port 0x104c
    port 0x104c = 0x480 (1152)
    read port 0x104c
    port 0x104c = 0x470 (1136)
    read port 0x104c
    port 0x104c = 0x460 (1120)
    read port 0x104c
    port 0x104c = 0x450 (1104)
    read port 0x104c
    port 0x104c = 0x440 (1088)
    read port 0x104c
    port 0x104c = 0x430 (1072)
    read port 0x104c
    port 0x104c = 0x420 (1056)
    read port 0x104c
    port 0x104c = 0x410 (1040)
    read port 0x104c
    port 0x104c = 0x400 (1024)
    read port 0x104c
    port 0x104c = 0x3f0 (1008)
    read port 0x104c
    port 0x104c = 0x3e0 (992)
    read port 0x104c
    port 0x104c = 0x3d0 (976)
    read port 0x104c
    port 0x104c = 0x3c0 (960)
    read port 0x104c
    port 0x104c = 0x3b0 (944)
    read port 0x104c
    port 0x104c = 0x3a0 (928)
    read port 0x104c
    port 0x104c = 0x390 (912)
    Error in Serial ADC: channel=61, delta=5 (2), min=0x127, max=0x12c, median=0x127, errors=1
    sample[16]=0x12c, delta=5
    read port 0x104c
    port 0x104c = 0x380 (896)
    read port 0x104c
    port 0x104c = 0x370 (880)
    read port 0x104c
    port 0x104c = 0x360 (864)
    read port 0x104c
    port 0x104c = 0x350 (848)
    read port 0x104c
    port 0x104c = 0x340 (832)
    read port 0x104c
    port 0x104c = 0x330 (816)
    read port 0x104c
    port 0x104c = 0x320 (800)
    read port 0x104c
    port 0x104c = 0x310 (784)
    read port 0x104c
    port 0x104c = 0x300 (768)
    read port 0x104c
    port 0x104c = 0x2f0 (752)
    read port 0x104c
    port 0x104c = 0x2e0 (736)
    read port 0x104c
    port 0x104c = 0x2d0 (720)
    read port 0x104c
    port 0x104c = 0x2c0 (704)
    read port 0x104c
    port 0x104c = 0x2b0 (688)
    read port 0x104c
    port 0x104c = 0x2a0 (672)
    read port 0x104c
    port 0x104c = 0x290 (656)
    Error in Serial ADC: channel=61, delta=5 (2), min=0xe7, max=0xec, median=0xe8, errors=1
    sample[0]=0xec, delta=4
    read port 0x104c
    port 0x104c = 0x280 (640)
    read port 0x104c
    port 0x104c = 0x270 (624)
    read port 0x104c
    port 0x104c = 0x260 (608)
    read port 0x104c
    port 0x104c = 0x250 (592)
    read port 0x104c
    port 0x104c = 0x240 (576)
    read port 0x104c
    port 0x104c = 0x230 (560)
    read port 0x104c
    port 0x104c = 0x220 (544)
    read port 0x104c
    port 0x104c = 0x210 (528)
    read port 0x104c
    port 0x104c = 0x200 (512)
    read port 0x104c
    port 0x104c = 0x1f0 (496)
    read port 0x104c
    port 0x104c = 0x1e0 (480)
    read port 0x104c
    port 0x104c = 0x1d0 (464)
    read port 0x104c
    port 0x104c = 0x1c0 (448)
    read port 0x104c
    port 0x104c = 0x1b0 (432)
    read port 0x104c
    port 0x104c = 0x1a0 (416)
    read port 0x104c
    port 0x104c = 0x190 (400)
    Error in Serial ADC: channel=61, delta=5 (2), min=0xa7, max=0xac, median=0xa7, errors=1
    sample[12]=0xac, delta=5
    read port 0x104c
    port 0x104c = 0x180 (384)
    read port 0x104c
    port 0x104c = 0x170 (368)
    read port 0x104c
    port 0x104c = 0x160 (352)
    read port 0x104c
    port 0x104c = 0x150 (336)
    read port 0x104c
    port 0x104c = 0x140 (320)
    read port 0x104c
    port 0x104c = 0x130 (304)
    read port 0x104c
    port 0x104c = 0x120 (288)
    read port 0x104c
    port 0x104c = 0x110 (272)
    read port 0x104c
    port 0x104c = 0x100 (256)
    read port 0x104c
    port 0x104c = 0xf0 (240)
    read port 0x104c
    port 0x104c = 0xe0 (224)
    read port 0x104c
    port 0x104c = 0xd0 (208)
    read port 0x104c
    port 0x104c = 0xc0 (192)
    read port 0x104c
    port 0x104c = 0xb0 (176)
    read port 0x104c
    port 0x104c = 0xa0 (160)
    read port 0x104c
    port 0x104c = 0x90 (144)
    Error in Serial ADC: channel=61, delta=5 (2), min=0x67, max=0x6c, median=0x67, errors=2
    sample[14]=0x6c, delta=5
    sample[19]=0x6c, delta=5
    read port 0x104c
    port 0x104c = 0x80 (128)
    Error in Serial ADC: channel=61, delta=9 (2), min=0x63, max=0x6c, median=0x63, errors=1
    sample[0]=0x6c, delta=9
    read port 0x104c
    port 0x104c = 0x70 (112)
    read port 0x104c
    port 0x104c = 0x60 (96)
    read port 0x104c
    port 0x104c = 0x50 (80)
    read port 0x104c
    port 0x104c = 0x40 (64)
    read port 0x104c
    port 0x104c = 0x30 (48)
    read port 0x104c
    port 0x104c = 0x20 (32)
    read port 0x104c
    port 0x104c = 0x10 (16)
    Error in Serial ADC: channel=2, delta=3 (2), min=0x27, max=0x2a, median=0x28, errors=0
    read port 0x104c
    value = 0x0 (0)

  • Hi,

     

    status of ads5296a problem:

     

    current test

    • All channels in the card (64 channels in 8 units of octal ADC)
    • 10-bit mode and 30 MHz frequency
    • Same DC input condition
    • DC sweep step = 4 LSB
    • Range of more than half of the ADC analog input range
    • 20 samples per DC point
    • Looking for occasional positive error from 3 LSB and UP
    • When we get error bigger than the step+error_value_allowed (here the number is 6) we will see error also in the next steps. (13, 9, 5)
    • Only partial number of the test fail (usually 10-20% )

     

     

    Summary:

     

    the picture describes exactly the behavior called “stick and jump”, which creates missing codes in the ADC transfer function.

    We observe the following behavior in some samples.

    For specific channels, at a specific ADC code value, the output occasionally jumps upward by approximately 3 to 40 LSB in 10-bit mode.

    If we run smaller step, we probably see smaller jump than the current test.
    This behavior is not random over the full range.

    It appears at the same ADC code region for the affected channel.

    It’s different from channel to channel.

    When the DC input is increased by a few LSB, the error magnitude is reduced.

    For example, if the original error is 10 LSB and the DC input is increased by 4 LSB, the remaining error becomes approximately 6 LSB.

    When the input is moved further away from this code region, the error disappears.

    This behavior looks similar to a local stick/jump transition in the ADC transfer curve, as shown in the attached figure.

    The ADC appears to stay around one code region and then occasionally jump to a higher output code, causing intermediate codes to be skipped.

    The issue is seen only on some channels, while all channels are driven with the same DC input.

     

    We run the test on 5 cards with 40 units of ads5296a.

     

    Small jump (3,4…) – few channels [out of scope because we will have more with smeller step).

    Medium jump (6-20)- 2 units with one defective channel and 2 unit with 3 or 4 defective channels.

    Large jump – one unit with 6 channels are defective. ( this units also have a lot of defective area)

     

    System influence:

    Small jump and medium jump – may cause performance degrading.

    Large jump – the image looks bad and calibration could not be done.

     

    Examples:

     

    Here you could see small jump (channel 2 and 40) and medium jump (channel 61)

    10 bit mode. Here we run 50 samples. You could see that in case of 20 sample we could miss small jump.

     

    Another card: medium jump (channel 14)

     

    Here you could see large jump.

    It’s running in 12-bit mode so divide the delta by 4 to compare the 10-bit mode.

     

  • Hi,

    I run loop on custom data capture by the FPGA from the defective ADC.

    16 value between 260 to 26F with 20 samples each.

    test competed successfully without any error. 

  • Hi Zeev,

    Could you please also tell us whether giving the ramp pattern as mentioned in the mail I sent you giving Test_patt2 shown below, also passed the test without any breaks.

  • Hi Zeev,

    I have a question from the schematic shared. I see that the output of the DAC is represented by PMG pins which are going to connector J3. However, the input of the filter_opamp block is represented by AI pins which are going to connector J4. But, I don't see any relation between PMG pins and AI pins. Are you connecting them through these connectors J3 and J4? Or, am I missing something here? 

  • Can you also please confirm that the differential 100 Ohms termination is placed very close to the device ADC clock pin?

  • Hi Sheetal,

    1. The test I run (shred with you earlier) is a proof there are non problems with the capturing data by the FPGA.

    2. The lines called PMG are connected to PMT and control the gain of the PMT. The AI is the the analog data send by the PMT to the card.

    3. The differential 100 Ohms termination is placed very close to the device ADC clock pins.

    regards

    Zeev Gerber