ADS9813: Clarification on ADS9813 SMPL_CLK and Simultaneous Sampling Operation

Part Number: ADS9813

Dear TI Support Team,
I would like to clarify my understanding of the ADS9813 sampling operation.
Based on the datasheet, I understand that the ADS9813 samples the analog inputs on the falling edge of SMPL_CLK.
1.I also understand that, because the ADS9813 is a simultaneous-sampling ADC, all channels (8 channels) are sampled simultaneously on a single falling edge of SMPL_CLK.
Could you please confirm the following points?
1.Is it correct that the ADS9813 samples the analog inputs on the falling edge of SMPL_CLK?
2.Is it correct that all channels are sampled simultaneously on each falling edge of SMPL_CLK?
3.IIf so, is it correct that:
 At the first falling edge of SMPL_CLK, all channels are sampled simultaneously.
 At the second falling edge of SMPL_CLK, all channels are sampled simultaneously again, creating a new sample set.
4.If the above understanding is correct, is the purpose of continuously providing SMPL_CLK to acquire a new set of samples from all channels at each falling edge?

Please let me know if any part of my understanding is incorrect.
Thank you for your support.
Best regards,
Kazunori Hirohashi