ADS114S08B: REFCOM Configuration with Asymmetric Power Supply

Part Number: ADS114S08B

What are the requirements for the REFCOM pin? The voltage from this pin is buffered, so I assume it does not necessarily need to be connected to AVSS, as buffering it would otherwise seem unnecessary.

I am designing a system with an asymmetrical power supply because I need to measure voltages from -50 mV to 2.45 V. I would like the chip to operate from -1 V and +3.1 V supplies while keeping REFCOM connected to GND. This would allow me to use the 2.5 V REFOUT voltage relative to ground to generate an ANINCOM voltage of -50 mV using a conventional solution with an additional op-amp.

Is this configuration supported? What is the max AVSS - REFCOM voltage? Can REFCOM exceed ANINCOM? I did not find answers in specs.

Regards,
Thomas

  • Hi Thomas,

    The maximum voltage difference between AVSS and REFCOM can be 0.3V as you can see the following table from ADS114S08B data sheet.

    I'm not sure what mean "Can REFCOM exceed AINNCOM". When the AVSS power supply is negative, AINNCOM can support absolute negative input voltage, REFCOM can be shorted to AVSS too.

    The power supply (-1V to +3.1V) will not damage the ADC as it does not violate the limit in the Absolute Maximum Ratings table, however the ADC performance were characterized under AVDD=2.7 ~5.25V and AVSS=0 as you can see the Electrical Characteristic table, so the performance under asymmetrical power supply can not be guaranteed.

    The simplest solution to measure your -50 mV to 2.45 V signal is to do signal conditioning on the front op-amp to meet the input requirement of ADS114S08B while operating according to Recommended Operating Conditions table in the data sheet.

    BR,

    Dale

  • Hi Dale,

    Thank you for the reply. Standard signal pre-conditioning (adding a positive bias) is precisely what I am trying to avoid, as it requires many additional components, especially since I plan to use all 12 channels. That is why I am looking for alternatives, such as keeping AVSS slightly below GND = REFCOM.

    Since AVSS = −1 V is too low (thank you for pointing that out), I may try using a smaller negative voltage, such as −210 mV, in order to maintain 150 mV VAINP-AVSS margin (section 9.3.2.1 PGA Input-Voltage Requirements) and not to exceed REFCOM-AVSS 300 mV limit.

    Although I understand that an asymmetrical power supply is not officially supported, there is probably some small range between a symmetrical bipolar supply and a unipolar supply where the ADC can still operate correctly.

    Thanks,

    Thomas