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AFE53004W: Input interface inquiry

Will Wang47
Expert 8920 points

Part Number: AFE53004W

Hi team,

Customer get one inquiry regarding the SDA, SCL pin. 

The pin table mention, it could power up before VDD. While the max rating shows it max is VDD + 0.3V, which mean it can't support SCL, SDA and other digital input ramp before VDD. Could you help clarify which is correct?

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Regards,

Will

  • 0
    TI__Mastermind 24715 points

    Hi Will,

    The SDA / SCLK pins will conduct through the ESD cells if you power the pins before VDD. This isn't an issue if you can guarantee enough resistance to keep the conducted current below the +/- 10 mA specification for current into any pin.

    If you can't guarantee the conduction into SDA / SCLK will be within that +/- 10 mA range, you would need to wait for VDD to ramp to avoid the ESD current.

    Regards,

    James