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ADS9817: PARALLEL SPI CONFIGURATION

MOHD AKBAR
Prodigy 30 points

Part Number: ADS9817
Other Parts Discussed in Thread: ADS9324

image.pngHi TI Team,

We plan to use two ADS9817 ADCs to monitor eight +5 V and eight −5 V supply outputs wrt the gnd. We have the following questions:

  1. Can both ADCs share SCLK and SDI ,SDO  with separate CS signals?
  2. When one ADC's CS is inactive (HIGH), does its SDO output enter a high-impedance (Hi-Z) state
  3. Can both ADCs share the same SMPL_CLKP and SMPL_CLKM signals to synchronize sampling?

I have attached -5V sensing ADC configuration , please check and let us know if there is any issue or precaution must be followed for sensing -5V wrt the gnd.

Please confirm whether this configuration is supported and highlight any design considerations.

Thank you.

 

  • +1
    TI__Expert 4295 points

    Hi Mohd Akbar,

    As you are trying to synchronously measure 8x +5V and 8x -5V signals: the ADS9324 is a more suitable option.

    For the ADS9817:

    1. The SPI port is used for configuration of device registers; SDO is hi-z when CS is high. You can share SCLK, SDI, SDO with separate CS signal.

    2. Yes, SDO is hi-z when CS is high.

    3. Yes, you should connect common clock to SMPL_CLKP/M for synchronizing two ADCs.

    Regards,
    Rahul

  • +1 in reply to RahulVK
    Prodigy 30 points

    Thanks Rahul , for clarifying my doubts. It's real help me to design it more efficiently. And we will consider to look the ADS9324 for further development projects.

    Thank you.

  • 0 in reply to RahulVK
    Prodigy 30 points

    Thanks Rahul , for clarifying my doubts. It's real help me to design it more efficiently. And we will consider to look the ADS9324 for further development projects.

    Thank you.