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DDC112 TEST Mode communication

Other Parts Discussed in Thread: DDC112

Hi everyone,

I just get into the DDC112. A first prototype is built and I'm currently implementing the communication.

This is what I did so far:

  • Within the initialization TEST is set to HIGH and RANGE0-2 is set to 111 (Cf = 87.5pF)
  • CLK is connectect to the 7.372800MHz microcontroller clock
  • A timer toggles the CONV pin every 1ms
  • As soon as DVALID goes LOW, an external interrupt is triggered
  • Within this external interrupt DXMIT is set to LOW
  • Afterwards DOUT is read and the DCLK is manually toggled two times
  • This is done 40 times
  • Later DXMIT is set to HIGH again

Unfortunatly, if I convert the 40bit string into two 20bit integer values, they don't look like the suggested output.

Thanks...

Benjamin Kuch

Seabear Diving Technology

  • Hi Benjamin,

    The DDC112 is actually supported in the Medical/High Reliability forum so I'll move your post for you.  In the meantime, can you describe your DCLK a bit more?  It sounds like you are doing a sort of bit-bang routine, what is the actual period of the clock?  Any chance you can send us screen captures of the interface?

  • Hi Tom,

    I don't use any oscillator for DCLK. I simply toggle an output PIN of the microcontroller, connected to DCLK.

    On the oscilloscope I see the data on DOUT. The timings seem to fit as well.

    What do you mean by 'screen capture of the interface' - the measured data output?

    Cheers

    Ben

  • Benjamin,

    What we need to see is the timing of all the clocks and data as shown on an oscilloscope.  You did not say the timing of the DCLK period.  You must make sure that you are not shifting out data when CONV toggles.  Also, all data must be shifted out before the next falling edge of DVALID.  The best procedure is to make sure all 40 bits of data are shifted out between the falling edge of DVALID and the next toggle of CONV.

    Best regards,

    Bob B

  • Hi Bob,

    on the pictue you see the timings of DCLK - DOUT (yellow) DCLK (cyan).The clock periods are not continous. I only toggle a Pin.

    I shift out the data as soon as DVALID goes low (external interrupt), so it is done before the next falling edge of DVALID.

    Regards

    Benjamin

  • Benjamin,

    It is quite essential to have a clean clock.  It appears that there is some glitching or extra clocks around 8 and 18.  I also see another clock pulse at the end of the screen shot.  Is that the next sequence?  Does DCLK complete not only before the next DVALID but also before the next CONV?  Do you have more than a two channel scope?  It would be good to also see DVALID, DXMIT and CONV signals as well?  I know that is five, but maybe a couple different shots showing the relationship of timing even with 2 channels would be helpful.

    Initially I would focus on why you are having those extra pulses.

    Best regards,

    Bob B

  • Thanks Bob!

    Finally I managed to get it to work properly!!! Currently I still have some problems with the voltage supply, but it should be solvable.

    But I have another question... How does the digital filter inside the DDC112 work. I have not found any information about it in the datasheet.

    Regards

    Benjamin

  • Benjamin,

    Glad to here you are making progress.  I'm not sure which type of digital filter is used for the DDC112. Basically the delta-sigma modulator oversamples the input and by doing so moves the quantization noise into the higher frequencies and the digital filter then removes the higher frequency component.  Variations of the filter can also remove various other frequencies depending on the design.  Unfortunately, I don't currently have access to any further information regarding the filter.

    Best regards,

    Bob B

  • Hi Bob,

    thanks for your support!

    I have another question... Currently my data transfer (reading the DOUT PIN) is quite slow. I do everything manually (set clock, start data transfer, read DOUT, ...).

    Is it also possible to use SPI for the communication?

    Regards

    Benjamin

  • Benjamin,

    You should be able to use the SPI peripheral.  You just need to make sure you maintain the timing requirements for the DDC112.

    Best regards,

    Bob B

  • I'm using the DDC112 now for a while and I thought it works fine. Now I recognized, that my maximum output value of IN1/IN2 is 4194303 (2^22) instead of  1048575 (2^20)???

    To get the data (after DVALID toggles) I run the following code (I only grap the data of IN2):

    uint32_t readADC(void) {

        uint32_t bitValue = 0;
        uint32_t result = 0;
        uint8_t x = 0;

        // start data transmission -> DXMIT to low
        PORTC.OUTCLR = PIN4_bm;

        // read databits
        for(uint8_t j=0; j<20; j++)  {

            x = 19 - j;
            bitValue = PORTC.IN & PIN2_bm;
            bitValue <<= x;
            result |= bitValue;
            
            // generate DCLK
            PORTC.OUTSET = PIN6_bm;
            PORTC.OUTCLR = PIN6_bm;
        }    

        // stop data transmission -> DXMIT to high
        PORTC.OUTSET = PIN4_bm;

        return result;
    }

  • Benjamin,

    I really don't see anything obviously wrong here.  Have you verified your data with a scope reading?  As you are only looping through 20 bits, you should not be getting a larger value.  You may have an issue passing the variable within your program.

    Best regards,

    Bob B