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ADC ADS1274

Other Parts Discussed in Thread: ADS1274

Dear E2E:

Thank you for your support.

I have the following questions about ADS1274:

1.  When ASD1274 channel is power down (PWDNn=0) - the ADS1274 outputs remain driven (DS page29). Is it correct?

2.  Does it mean - the serial port still send the DOUT?  

3.  What are the value of DOUT (when the DOUT are converted to voltage)?

4.  Figure 75 shows DOUT=0 (in TDM, Fixed Position). Does it mean - DOUT=0 all the time during PWRDN mode?

4.  We are seeing after PWDN changing to high (active mode) - very long ramp of the converted voltage from the high level to the expected very low amplitude (~5mV).    The time of the ramp is much longer than 129 conversion (in ~100 times)

5  We use the sampling rate of 4.88Ksps for the input frequency of 7Hz (5mV amplitude).

6.  Can you please explain - what can cause such a long Voltage ramp?

Thank you very much for your help,

Boris Ruvinsky

 

  • Hi Boris,

    I will do my best to answer your questions below -

    1. You should be fine continuing to drive the inputs when they are powered down as long as you are not exceeding any of the max specs which would turn on the ESD diodes.

    2. As long as at least once channel is powered and /DRDY is toggling, the converter is running and updating its conversion result. How the data is displayed would depend on whether you are in fixed mode or dynamic mode. See page 29-30.

    3. See table 5

    4. See page 32. The data for the powered down channels will come back as all zeroes rather than be skipped from the data feed all together.

    4. Are you stating that you see a time longer than 130 conversion cycles for new data to be ready when the device is brought out of power down? Could you elaborate if you have a problems here.

    5.

    6. I am not completely sure I understand your description. Could you possibly add a picture to help explain which voltage ramp you are talking about. You need to keep in mind the group delay and latency associated with the ADS1274 is on the order of 39/78 conversion cycles.

    Regards,

    Tony Calabria