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Decoupling simulation with TI TINA

David Liu2
Prodigy 40 points

Other Parts Discussed in Thread: TPS74701, DAC3482

We have a project using some LDOs on DAC, ADC, Clock Gen., such as TPS74701, TPS79301, TPS72501...

I want to know:

 how can I build up a good power/ground plane with decoupling caps using TI TINA.

 

Thanks

David

 

  • 0
    TI__Mastermind 22825 points

    Hi David,

    Are you asking for guidelines for power / ground planes and decoupling caps (like an Application Note or tutorial)? I'm not sure what you mean by "using TINA" since TINA is a simulation tool and is not for PCB layout.

    I found the following information which may be useful to you if you are looking for tutorial on regulator layout next to high performance data acquisition components:


    http://www.ti.com/lit/an/snva602/snva602.pdf

    http://www.ti.com/lit/ml/slup224/slup224.pdf

    http://www.ti.com/litv/pdf/slua534

    http://www.ti.com/lit/wp/snaa113/snaa113.pdf

    Thanks,

    Hooman

  • 0 in reply to Hooman Hashemi
    Prodigy 40 points

    Hi Hooman,

    Sorry, it is my fault.

    For example, DAC3482 need a 1.2V and 3.3V for digital and analog power supply. External supply can provide 5.0V to the board. So we will need some LDO (such as TPS79301, TPS72501) to transfer the voltage to proper voltage level. But DAC needs a high performance and clear supply, usually we will need some decoupling caps to be a filter. That can reduced noise and impedence of power plane.

    So I want to know:

     How can I make sure the combination of LDOs and decoupling caps that is good for high speed DAC?

     Can TI TINA help to do this task?

     

    Thanks and Best Regards,

    David

     

  • 0 in reply to David Liu2
    TI__Mastermind 22825 points

    Hi David,

    I found the following reference designs with respect to the regulators you had noted, which allows you to do "load transient" simulation:

    TPS74701: http://www.ti.com/litv/tsc/slim253

    Here is the link to all the TINA reference designs, for your reference:

    http://www.ti.com/adc/docs/midlevel.tsp?contentId=55102&DCMP=hpa_hpa_elabs&HQS=Tools+OT+spicerack

    However, since TINA is not a PC board layout tool, for layout optimization, you'd need to consulate some of the application note links I provided before (or other tutorial material).

    Hope this helps you.

    Regards,

    Hooman

  • 0 in reply to Hooman Hashemi
    TI__Guru* 83355 points

    David,

    You can use your PCB tools to derive the via inductance and board capacitance. Also, you can use the capacitor manufacturer's datasheet to derive the ESR, ESL, etc. Once you have all these models, you can use TINA to simulate the impedance over frequency. See attached example.

    You may also refer to this article describing the use of single value capacitors to eliminate peaking due to ESR. The use of board capacitance for broadband filtering is helpful for high speed systems. 

    http://www.interferencetechnology.com/eliminating-the-myths-about-printed-circuit-board-powerground-plane-decoupling/

    -KH

    DAC3484 Bypass caps.TSC
  • 0 in reply to Kang Hsia
    Intellectual 325 points

    Hi Kang,

    That's a good idea. Thanks.

    Best Regards,

    David