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Low noise and deep memory for high-speed, high resolution ADC

Bernard Harris1
Prodigy 30 points
Other Parts Discussed in Thread: ADC16V130, ADS5562, ADS5482

We are considering an ADC for a 16-bit  photodetector application, with candidates including ADS5562, ADS5582 and ADC16V130. The most important selection factor is low SNR, but we'd also very much like to have deep memory on the eval board. It appears that the eval board only has a 64ksample depth, which is not enough. Is there an alternative, either from TI or from a third party. A few megasamples would be closer to our target.

Thanks

  • 0
    TI__Expert 3940 points

    Hi Bernard,

    What is your target SNR and sampling bandwidth for the application?

    Kind regards,

    Marjorie

  • 0 in reply to Marjorie Plisch
    TI__Mastermind 29220 points

    Hi,

    And for the ADS5562 and ADS5482 EVMs, consider the TSW1400 Capture Card which has much more memory capacity than the 64K samples that the TSW1200 had.  The TSW1400 has a 1G-byte memory which can hold as much as 512M samples.  A few Megasamples would not be a problem with the TSW1400. 

    http://www.ti.com/tool/tsw1400evm

    Regards,

    Richard P.

  • 0 in reply to Richard Prentice
    Prodigy 30 points

    Thanks to both Marjorie and Tim for the very quick reply.  The SNR and sample rate tradeoffs of the whole system are being worked out - the ADC is just part of it.

    The TSW1400EVM looks excellent in terms of memory depth. We would like to use the pattern generator to drive pseudo-random binary sequences synchronized with the data capture. They need not be analog, and a binary bit stream would be fine. 

    • Can the TWS1400EVM output a digital output?
    • What is the maximal length of the pattern generator output?
    • Is it possible to trigger the pattern generator and the ADC from an external source? Are the triggers separate ?
    • Can the raw sampled ADC data can be uploaded to the PC for post-processing? Are there any size limits?
    Thanks a lot
    Bernard
  • 0 in reply to Bernard Harris1
    TI__Mastermind 29220 points

    Hi,

    The TSW1400 can serve as a Capture Card for out high speed ADCs or as a pattern generator for our high speed DACs, with connectors for the LVDS interface to our LVDS ADCs and DACs and a connector for the interface to our CMOS ADCs and DACs.  So yes, the TSW1400 can output digital patterns for DACs.  But the firmware for the FPGA was written to be *either* a pattern generator or a capture card at any one time - not both at the same time.  The deep memory can be used to capture samples from an ADC or it can be used for the pattern store for output to a DAC.  But only one function at a time.  At run time, the bit file for the FPGA is loaded into the FPGA on the TSW1400 based on the function chosen - ADC or DAC interface.

    In pattern generator mode for DACs the full 1G byte DDR memory can be used to hold as many as 512M samples total, allocated over 2 or more channels expecting dual or quad DACs, so there is at least 256M samples available for one 16b lane.

    in both capture mode and pattern generator mode there are SMA connections for external triggering.  In capture mode, an external trigger can be used to start the capture and in DAC mode there are trigger signals to synchronize multiple TSW1400 pattern generators.

    In capture mode, the captured data can be saved as a csv file for import into other tools such as a spreadsheet or Matlab or anything that can parse a comma-separated-value format.  The only limitation might be the size of a file that the importing tool can accept.  We can store the full 512Msampel file.

    Take a look at the User Guide for the TSW1400 at that link that I included previously.  If you wish to generate patterns and capture, and have each externally triggered then I think you would need two TSW1400.  

    Regards,

    Richard P.