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ads 1232 Vref and offset

analog guy
Prodigy 30 points
Other Parts Discussed in Thread: ADS1232, TPS60241

hi,

i've  experienced some offset problems when using the ads 1232 with a 0.5mv/V load Cell. Because of the low sensitivity of the load cell i'm using a reduced Vref of 1.666V (5V/3 ) in a ratio metric configuration (voltage divider) and a gain of 128. (VREFN 0V, AVDD and DVDD 5V, 0.1uF HQ poly as Bypass cap, clean vref and supply, using a ground plane, no supply loops and caps near ADC)

To figure out where the offset comes from i've shorted AINP and AINN and put it on 2.5V potential to not violate the conmen mode condition. After offset calibration (26 sclk's) the result should be a noise around zero.

Everthing works fine  when using 5V Vref . But when using the reduced Vref there is a large offset error.  In general the measurements are fine with 1.666 Vref, SNR is 3 times better compared to 5V Vref, linearity is fine. But i really like to understand where this offset error comes from and i can't see violation of the specs.

Are there any reported problems?

Best Regards

  • 0
    TI__Guru**** 180931 points

    Hi Analog Guy!

    Welcome to the e2e forum!  What is the magnitude of offset error you are seeing with this configuration of the ADS1232?

  • 0 in reply to Tom Hendrick
    Prodigy 30 points

    Hey,

    i've taken a few hundred samples from two different prototypes.

    At 1.666 Vref:

    1 : mean   1.0262e-05, std: 3.2055e-07

    2 : mean  -5.3494e-06 , std:  2.5271e-07

    At 5 Vref:

    1 : mean 1.0545e-07, std:  6.0846e-07

    2 : mean 1.2810e-07, std:  6.6536e-07

    Means shift slightly between different measurements and in case of 5Vref it's always more or less a noise around 0.

  • 0 in reply to analog guy
    TI__Guru** 113765 points

    Analog Guy,

    Are you running the Offset Cal procedure?  I also wonder about your reference?  How are you deriving it?  Are you using a voltage divider?

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Prodigy 30 points

    Hey,

    yes i'm running the offset calibration before taking a measurement. And yes, i'm using a voltage divider between 5V and GND.  (3 identical 10K resistors with same temperature coefficient to better compensate drift).

    I made some more tests and figured out that the offset error increases somewhat linear when reducing Vref from 5V to 3.3V, 2.5 and 1.66. (DVDD and AVDD always at 5V)

    As far as i remember the offset error disappears when using a gain of 1 or 2.

    Thanks

  • 0 in reply to analog guy
    TI__Guru** 113765 points

    Analog Guy,

    I was able to find some information regarding some tests done some time ago with respect to reference voltage and offset.  At 5V Vref, things look good, but as the reference voltage decreases the offset increases with gain.  Also, noise increases as well as you lower the reference voltage.

    At a gain of 1 or 2, the internal buffer stage is not in circuit whereas it is in circuit for gains of 64 and 128.  One thing that may reduce the affect you are seeing is to increase the current to the reference.  The flow of current to the reference is not constant, but rather is switched in and out at the modulator rate.  I would suggest placing a 0.1uF across the Vref pins, even though this will disturb the ratiometric measurement.

    It is quite possible that even though you have increased your dynamic range by lowering the reference voltage, your noise free counts may have actually have reduced.  You might find a better trade off but using a reference voltage that is slightly higher (3.3V) which may actually prove to be better for both noise and offset.

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Prodigy 70 points

    Dear Bob,

    We are trying to run ADS1232 from a 3.2VDC supply and have noticed an increase in noise, (compared to a 5VDC supply) in line with your explanation above. We would like to get 21 bits of resolution as we do with a 5VDC supply.

    Is it feasible to use a switched capacitor voltage converter such as TPS60241 to boost AVDD and AREF to 5VDC ?

    Igor

  • 0 in reply to Igor Tabakov
    TI__Guru** 113765 points

    Hi Igor,

    Welcome to the forum! If you look at page 5 of the ADS1232 datasheet you will see the noise levels for 5V AVDD and 3V AVDD.  At gains of 1 and 2 the peak to peak noise nearly doubles when dropping the supply/reference voltage from 5V to 3V.  The levels of noise at the higher gains do not change as much.  So you are correct in that to achieve the higher performance with the lower level of noise you need AVDD at 5V.

    The TPS60241 should work as long as the total current does not exceed 25mA.  Also, you need to make sure that you do not increase the level of noise with poor PCB layout and isolation of the switcher from the analog input.  Grounding is especially important.

    All that said, you must remember that you need to look at more than just the number of bits.  In other words 21-bit performance with a 5V reference is much different than 21-bit at 3V reference.  The number of bits mentioned is the obtainable resolution, but the actual values represented by each bit (LSB size) changes depending on the reference.  For a gain of 1, the 5V reference will have an LSB size of about 298nV and for 3V about 179nV at the 24-bit level.  At 21-bits the 5V noise free resolution is about 2.4uV and 3V at 20-bits would be about 2.8uV, so losing one bit is not as significant as you might think.

    One of the important considerations is the full-scale range of the ADC compared to the range of the sensor being measured. The ADS1232 works the best measuring ratiometrically.  An example of this is a bridge sensor excited by the same source as the reference.  But other types of sensors can be connected to the ADS1232 in which a ratiometric measurement is not possible.  In this case you want to match the output of the sensor to the full-scale range of the ADC for the optimal LSB size with respect to noise.

    Best regards,

    Bob B