hi everyone,
i tried to build the interface between ddc112 and 32bit atmel proceesor .
This is what I did so far:
- TEST pin is set to High and RANGE0-2 is set to 111 (Cf = 87.5pF)
- CLK frequency is 10mhz (pwm)
- Conv pin toggles for every 1ms second(frequency is 1khz) using pwm
- each time polling the DVALID pin status.
- DXMIT is hold in low level
- DXMIT enables dout pin and we can read data on rising edge of DCLK
- Later DXMIT is set to High again.
- I have attache my code , please see the code and please reply
-
int main(void)
{
pm_switch_to_osc0(&AVR32_PM, FOSC0, OSC0_STARTUP);
/* Setup PLL0 on Osc0, mul=7 ,no divisor, lockcount=16, ie. 12Mhzx8 = 96MHz output */
pm_pll_setup(&AVR32_PM,
0, // use PLL0
9, // MUL=7 in the formula
3, // DIV=1 in the formula
0, // Sel Osc0/PLL0 or Osc1/PLL1
16); // lockcount in main clock for the PLL wait lock
/* PLL output VCO frequency is 96MHz. We divide it by 2 with the pll_div2=1. This enable to get later main clock to 48MHz */
pm_pll_set_option(&AVR32_PM, 0, 1, 0, 0);
/* Enable PLL0 */
pm_pll_enable(&AVR32_PM, 0);
/* Wait for PLL0 locked */
pm_wait_for_pll0_locked(&AVR32_PM);
/* Divide PBA clock by 2 from main clock (PBA clock = 48MHz/2 = 24MHz) */
pm_cksel(&AVR32_PM,
1, // Peripheral Bus A clock divisor enable = 1
0, // Peripheral Bus A select = 0
0, // Peripheral Bus B clock divisor enable = 0
0, // Peripheral Bus B select = 0
0, // High Speed Bus clock divisor enable = 0
0); // High Speed Bus select = 0
/* Switch main clock to 48MHz */
pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCSEL_PLL0);static const gpio_map_t USART_GPIO_MAP =
{
{EXAMPLE_USART_RX_PIN, EXAMPLE_USART_RX_FUNCTION},
{EXAMPLE_USART_TX_PIN, EXAMPLE_USART_TX_FUNCTION}
};// USART options.
static const usart_options_t USART_OPTIONS =
{
.baudrate = 115200,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = USART_NORMAL_CHMODE
};// Assign GPIO to USART.
gpio_enable_module(USART_GPIO_MAP,sizeof(USART_GPIO_MAP) / sizeof(USART_GPIO_MAP[0]));// Initialize USART in RS232 mode.
usart_init_rs232(EXAMPLE_USART, &USART_OPTIONS, FPBA);
delay_init(FPBA);
ddc112_Init();
while(1)
{
//usart_write_line(EXAMPLE_USART,"DEBEL\r\n");
//delay_ms(1000);
//Poll for DVALID pin to go low, indicating valid data avail
if(0==gpio_get_pin_value(DDC112_DVALID_PIN ))
{
ddc_getResult();
data[0]=(U8)ddcResults[0];
data[1]=(U8)ddcResults[0]>>8;
data[2]=(U8)ddcResults[0]>>16;
data[3]=(U8)ddcResults[0]>>24;
usart_write_char(EXAMPLE_USART, data[0]);
usart_write_char(EXAMPLE_USART, data[1]);
usart_write_char(EXAMPLE_USART, data[2]);
usart_write_char(EXAMPLE_USART, data[3]);
data[4]=(U8)ddcResults[1];
data[5]=(U8)ddcResults[1]>>8;
data[6]=(U8)ddcResults[1]>>16;
data[7]=(U8)ddcResults[1]>>24;
usart_write_char(EXAMPLE_USART, data[4]);
usart_write_char(EXAMPLE_USART, data[5]);
usart_write_char(EXAMPLE_USART, data[6]);
usart_write_char(EXAMPLE_USART, data[7]);
}
}
}void ddc112_Init(void)
{
//DDC112 Setup
//Configure DOUT pin
gpio_enable_gpio_pin(DDC112_DOUT_PIN);
gpio_enable_gpio_pin(DDC112_DVALID_PIN);
//Configure DCLK pin (OUT)
gpio_enable_gpio_pin(DDC112_DCLK_PIN);
gpio_disable_pin_pull_up(DDC112_DCLK_PIN);
//gpio_local_enable_pin_output_driver(DDC_DCLK_PIN);
gpio_set_gpio_pin(DDC112_DCLK_PIN);
gpio_enable_gpio_pin(DDC112_DXMIT_PIN);
gpio_disable_pin_pull_up(DDC112_DXMIT_PIN);
//gpio_local_enable_pin_output_driver(DDC112_DXMIT_PIN);
gpio_clr_gpio_pin(DDC112_DXMIT_PIN);
//Configure TEST pin (OUT)
gpio_enable_gpio_pin(DDC112_TEST_PIN);
gpio_disable_pin_pull_up(DDC112_TEST_PIN);
//gpio_enable_pin_output_driver(DDC112_TEST_PIN);
gpio_set_gpio_pin(DDC112_TEST_PIN);
//Configure RANGE0 pin (OUT)
gpio_enable_gpio_pin(DDC112_RANGE0_PIN);
gpio_disable_pin_pull_up(DDC112_RANGE0_PIN);
//gpio_local_enable_pin_output_driver(DDC112_RANGE0_PIN);
gpio_set_gpio_pin(DDC112_RANGE0_PIN);//Configure RANGE1 pin (OUT)
gpio_enable_gpio_pin(DDC112_RANGE1_PIN);
gpio_disable_pin_pull_up(DDC112_RANGE1_PIN);
//gpio_local_enable_pin_output_driver(DDC112_RANGE1_PIN);
gpio_set_gpio_pin(DDC112_RANGE1_PIN);//Configure RANGE2 pin (OUT)
gpio_enable_gpio_pin(DDC112_RANGE2_PIN);
gpio_disable_pin_pull_up(DDC112_RANGE2_PIN);
//gpio_local_enable_pin_output_driver(DDC112_RANGE2_PIN);
gpio_set_gpio_pin(DDC112_RANGE2_PIN);ddc112_initPWM();
ddc112_setRange(DDC112_RANGE_CF_87P5);
}
void ddc112_initPWM(void)
{
pwm_opt_t pwm_opt; // PWM option config.avr32_pwm_channel_t pwm_channel_clk = { .ccnt = 0 }; // One channel config.
avr32_pwm_channel_t pwm_channel_conv = { .ccnt = 0 };
unsigned int channel_id_clk;
unsigned int channel_id_conv;
// PWM controller configuration.
pwm_opt.diva = AVR32_PWM_DIVA_CLK_OFF;
pwm_opt.divb = AVR32_PWM_DIVB_CLK_OFF;
pwm_opt.prea = AVR32_PWM_PREA_MCK;
pwm_opt.preb = AVR32_PWM_PREB_MCK;pwm_init(&pwm_opt);
channel_id_clk = DDC112_CLK_PWM_CHANNEL_ID;
channel_id_conv = DDC112_CONV_PWM_CHANNEL_ID;
gpio_enable_module_pin(DDC112_CLK_PIN, DDC112_CLK_FUNCTION);
gpio_enable_module_pin(DDC112_CONV_PIN, DDC112_CONV_FUNCTION);// CONV CLK CONFIG---1kHz
pwm_channel_conv.CMR.calg = PWM_MODE_LEFT_ALIGNED; // Channel mode.
pwm_channel_conv.CMR.cpol = PWM_POLARITY_HIGH; // Channel polarity.
pwm_channel_conv.CMR.cpd = PWM_UPDATE_DUTY; // Not used the first time.
pwm_channel_conv.CMR.cpre = AVR32_PWM_CPRE_MCK; // Channel prescaler.
pwm_channel_conv.cdty = 10000; // Channel duty cycle, should be < CPRD.
pwm_channel_conv.cprd = 20000; // Channel period.
pwm_channel_conv.cupd = 0; // Channel update is not used here.//CLK is fixed at 10MHz (System clock)
pwm_channel_clk.CMR.calg = PWM_MODE_LEFT_ALIGNED; // Channel mode.
pwm_channel_clk.CMR.cpol = PWM_POLARITY_HIGH; // Channel polarity.
pwm_channel_clk.CMR.cpd = PWM_UPDATE_DUTY; // Not used the first time.
pwm_channel_clk.CMR.cpre = AVR32_PWM_CPRE_MCK; // Channel prescaler.
pwm_channel_clk.cdty = 1; // Channel duty cycle, should be < CPRD.
pwm_channel_clk.cprd = 2; // Channel period.
pwm_channel_clk.cupd = 0; // Channel update is not used here.
//(MCK/prescaler)/period, MCK = 12000000, Prescale =1, Period=3pwm_channel_init(1, &pwm_channel_conv); // Set channel configuration to channel 1.
pwm_channel_init(0, &pwm_channel_clk); // Set channel configuration to channel 0.
pwm_start_channels(0b00000011);//pwm_start_channels(1 << channel_id_clk);
}void ddc112_setRange(U8 range)
{
if((range&&0x01)==1)
{
gpio_set_gpio_pin(DDC112_RANGE0_PIN);
}
else
{
gpio_clr_gpio_pin(DDC112_RANGE0_PIN);
}if((range&&0x02)==1)
{
gpio_set_gpio_pin(DDC112_RANGE1_PIN);
}
else
{
gpio_clr_gpio_pin(DDC112_RANGE1_PIN);
}if((range&&0x04)==1)
{
gpio_set_gpio_pin(DDC112_RANGE2_PIN);
}
else
{
gpio_clr_gpio_pin(DDC112_RANGE2_PIN);
}
}void ddc_getResult(void)
{
int i=0;
int j=0;
int ch=0;ddcData[0]=0;
ddcData[1]=0;
ddcData[2]=0;ddcResults[0]=0;
ddcResults[1]=0;
gpio_clr_gpio_pin(DDC112_DXMIT_PIN);
for(ch=0;ch<2;ch++)
{
ddcData[0]=0;
ddcData[1]=0;
ddcData[2]=0;for(i=0;i<2;i++)
{
for(j=0;j<8;j++)
{
if(1==gpio_get_pin_value(DDC112_DOUT_PIN))
{
ddcData[i]<<=1;
ddcData[i]=ddcData[i] | 0x01;
}
else if(0==gpio_get_pin_value(DDC112_DOUT_PIN))
{
ddcData[i]<<=1;
ddcData[i]=ddcData[i] | 0x00;
}
gpio_clr_gpio_pin(DDC112_DCLK_PIN);
gpio_set_gpio_pin(DDC112_DCLK_PIN);
}
}
for(j=0;j<4;j++)
{
gpio_set_gpio_pin(DDC112_DCLK_PIN);
if(1==gpio_get_pin_value(DDC112_DOUT_PIN))
{
ddcData[2]<<=1;
ddcData[2]=ddcData[2] | 0x01;
}
else if(0==gpio_get_pin_value(DDC112_DOUT_PIN))
{
ddcData[2]<<=1;
ddcData[2]=ddcData[2] | 0x00;
}
gpio_clr_gpio_pin(DDC112_DCLK_PIN);
gpio_set_gpio_pin(DDC112_DCLK_PIN);
}
ddcResults[ch] = (U32)((ddcData[2]<<16)|(ddcData[1]<<8)|ddcData[0]);
}
gpio_set_gpio_pin(DDC112_DXMIT_PIN);
//return ddcResults;
}