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ADC12D1800 Reference board Data Streaming

Monte Bateman
Prodigy 20 points
Other Parts Discussed in Thread: ADC12D1800

I have the ADC12D1800 reference board. I need to stream data from this board.

The user's guide says "FMC Expansion Header for streaming data capture".

I assume that PC (computer) boards may be available to convert FMC -> PCIe.

My questions:

1. Does this board stream data over the FMC port, and if so, how fast? Full rate?

2. Do adapter boards exist to take the FMC data stream into PCIe? If so, can anyone suggest one?

Thanks,

Monte Bateman

  • 0
    TI__Mastermind 44680 points

    Hi Monte

    How much of the ADC raw data do you intend to stream into the PC environment? The total output data bandwidth of the board is 1800 MS/second x 12 bits x 2 converters for an aggregate total of 43.2 Gbit/sec. Do you have an identified data sink in the PC environment that can store or process that rate of data?

    In theory it is possible to develop code on a Xilinx or third party FMC carrier card to send the data to a PC motherboard using the PCIe interface. But I don't think it will be possible to transport the full rate, or to sustain the supported data rate for very long.

    We have not developed any firmware or software to implement this type of system, but the hardware does exist to do it. Examples would be the Xilinx ML-605 and VC-707 platforms. From a brief check of the PCIe spec and the user guides for those Xilinx boards, I believe their PCIe interfaces are capable of the following total data bandwidth:

    ML-605 - 8 lanes of Gen 1 PCIe. 8 x 250MB/s x 8bits/Byte = 16 Gbit/sec

    VC-707 - 8 lanes of Gen 2 PCIe. 8 x 500MB/s x 8bits/Byte = 32 Gbit/sec

    I hope this is helpful.

    Best regards,

    Jim B

  • 0 in reply to Jim Brinkhurst1
    Prodigy 20 points

    I am trying to capture data "at the highest bandwidth possible" from a phenomena that lasts 0.5 to 1.0 second. Obviously it will need a triggering source.

    So the second card you list (VC-707) is capable of 32 Gb/s, which is 75% of what the ref board can do, or 1350 MS/s x 2 channels.

    Related question: Can the ref card/ADC sample from both channels but at different speeds?  Say channel 1 at 100 MS/s and channel 2 at 1800 MS/s?

    Thanks for the help,

    Monte

  • 0 in reply to Monte Bateman
    TI__Mastermind 44680 points

    Hi Monte

    The ADC itself has a single clock input, so the I and Q channels are always sampling and outputting data at the same rate.

    It would be possible to do selective decimation inside the VC-707 FPGA, reducing the data of one ADC channel down to whatever rate is desired.

    I hope this is helpful.

    Best regards,

    Jim B