Hi all,
I am having difficulty communicating with the TVP70025i over the I2C interface. Basically what is happening is that we are not seeing an ACK back from the TVP70025i in response to an I2C transaction which contains its address (in other words, the TVP70025i should hold SDA low during the 9th clock period, but it isn't). We have spent days on it and tried everything we can think of, but no joy. The I2C master is an FPGA so we have some flexibility over the timing etc. There is nothing else on the I2C bus and we have 2k2 pullups to 3V3. We have tried the same FPGA design but communicating with a different I2C slave (an EEPROM) over a different I2C bus and it works fine.
Some questions:
1. Do you know of any particular bugs or errata regarding this that are not documented?
2. Are there any particular data format or timing requirements for the I2C that are not documented?
3. I have a suspicion that this might be due to the precise timing of when the I2C master releases the SDA line (to allow the TVP70025i to pull it low). Do you have any information on this, there is not much in the datasheet
thanks in advance!
Nick