Hi,
My application:
3 channels, each sampled at 250 Hz (so 750 Hz aggregate sampling rate or 1.33 ms period).
Having the correct sampling rate is very important for my application. (I want to start a conversion every 1.33 ms)
At first I thought I could simply sample continuously at 1000 SPS and discard 1 channel, but I then I realised that if you want to multiplex, you need to write MUX0 which slightly lengthens the time between samples and I'd have an effective sampling rate slightly less than 1000 Hz.
So my planned approach now is:
- have a reliable timer-driven interrupt on the START pin that initiates a conversion
- wait for DRDY to assert (after ~ 1 ms at 1000SPS)
- Send the RDATA command
- Send the WREG command to update the MUX0 while reading out the 24 bits of data (*)
- Deassert the START pin
- loop.
By my reading of the datasheet, leaving the start pin high while updating the MUX0 will start a new conversion (see *). If I deassert the start pin then re-assert it a short time later, before that conversion is to complete, will the ADC restart the conversion ?
e.g. at 1000 SPS, it takes 1 ms to perform a conversion and I'd deassert the START pin shortly after the conversion then re-assert it ~0.33 ms later (for the next measurement at 750 Hz).
So my question - will this work?
If I had it running at 2000 SPS, the first conversion would complete @ t = 0.5 ms, and it'd get another conversion at t ~= 1.0 ms (which would have to be discarded because at 750 Hz sampling rate, the next conversion shouldn't start until t=1.33 ms).
Secondly, in the datasheet it talks about sending an RDATA command in the last 8 bits of the readout of the previous RDATA command. I understand it's possible, but I fail to understand why this example is given - why would you want to read out the same data twice in a row, it'd be identical? This question is just my curiosity getting the better of me, have I missed something?
Cheers,
Kyle