DDC264 daisy chain configuration read timing diagram

Ron Ying

Other Parts Discussed in Thread: DDC264

In DDC264 SPEC, Fig33 is the timing diagram of DDC264 configuration. We can use DOUT to read configuration register. In a daisy chained mode, can we use only the last chained DOUT to read the configuration register of 4 DDC264 devices? If yes, what is the timing diagram then?

over 12 years ago

0 Van Yang over 12 years ago

TI__Prodigy 500 points

Hi Ron,

It's ok for the use the last chained DOUT to read out the configuration registers. Same timing, 320 idle clock, data of the first ddc should be output, then 320 idle clock, the second data, like this.

Van

0 Ron Ying over 12 years ago in reply to Van Yang

Intellectual 285 points

HI Van, thanks for the reply. Ron

0 Martin Li over 10 years ago in reply to Van Yang

TI__Intellectual 815 points

Hi Van,

What do you mean by " the first ddc" here?

is that the one connects the DOUT to the processor?

Thanks!

Martin Li

0 Adam Sidelsky over 10 years ago in reply to Martin Li

TI__Guru 63390 points

Van,

The "first DDC" is the DDC that has the DOUT that connects directly to the FPGA or processor. When reading out Data or configuration through DOUT, the DDC closest to the FPGA will always clock out its data first before passing the data from other DDCs in the serial chain. The configuration is very similar to a chain of serial shift registers that pass data along the chain from DIN to DOUT as the CLK is asserted.

For further queries please start a new thread so we may answer it individually.

Regards,

-Adam Sidelsky

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DDC264 daisy chain configuration read timing diagram