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DAC3162EVM

Stan Vaughn
Prodigy 70 points
Other Parts Discussed in Thread: CDCP1803, DAC3162

Hi,

I am working on  a project where the DAC3i62EVM is connected to the FMC connector on a Spartan6 SP601 Evaluation board. We are generating a gaussian wave for RF pulse shaping in a high power amplifier. I plan to drive the EVM with 200 MHz clock from the FPGA board. My question is if set the output to 1.8V will this work with the CDCP1803 clock chip on the eval board. Will it work with the square wave clock from the FPGA?

thanks

Stan Vaughn

  • 0
    TI__Genius 17320 points

    Hi Stan,

    I think this should be fine. There is a DC blocking cap on the DAC3162 EVM clock input which will center the swing around the bias point, which will swing symmetrically about the negative input pin. A 1.9 Vpp swing will create maximum voltage differences between the positive and negative input pins of 950 mV, which is within the 500 mV to 1300 mV recommended operation condition.

    Regards,
    Matt Guibord