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ADS1247 Gain error?

Lelumpolelum
Prodigy 100 points

Hi

This time i have another problem. I have to extend range of my RTD transducer  to 850'C. Problem is 3 C degree error at the end of range (850'C) at -200 everything is ok.There is some parameters  of my design Rbias = 825 Idac 1.5mA Rcomp=220 5SMPS. I dont know where problem lies software or hardware. At first i thought it is gain error but gain error is to low. ill apreciate any question or suggestion.

 

AVSS 0 Rpt100 400
AVDD 5 Rcomp 220
PGAGAIN 8 Ref 825
VinDiff 0.27 Idac 1.50E-003
Vref 2.475
V+ 3.075
V- 2.805
Vcm 1.176
Common mode voltage Range
1.18 <Vcm< 3.82
Full Scale Voltage
FSV 0.309375 Temp C RTD Res Vref Vinp Vinn Vdiff VCM VCM(max) VCM(MIN)
Expected differential voltage 850 390.48 2.475 3.06072 2.805 0.25572 2.93286 3.87712 1.12288
should not exceed the full scale voltage 600 313.71 2.475 2.945565 2.805 0.140565 2.8752825 4.33774 0.66226
500 290.98 2.475 2.91147 2.805 0.10647 2.858235 4.47412 0.52588
325 220.92 2.475 2.80638 2.805 0.00138 2.80569 4.89448 0.10552
-200 18.52 2.475 2.50278 2.805 -0.30222 2.65389 6.10888 -1.10888
Offset Error 1.50E-005
GainError at 850"C 0.000012786  0.255*0.05%
INL Error 4.640625E-006
Total Accuracy error 2.02488813614635E-005  
V/'C= 5.31E-004
  • 0
    TI__Guru** 113765 points

    Lelumpolelum,

    If you have a gain error, you should be able to track it with more measurement points.  The plot of data between 325 and 850 should appear linear.  All the calculations assume ideal resistance, is the board temperature remaining constant? 

    It is interesting that you are seeing this in only one direction.  The total error is the root sum square of each individual error (including the RTD.) I would take more measurement points between 325 and 850 to see if there is a non-linearity.

    There is also one other design parameter to consider and that is the voltage compliance of the IDAC.  You should be ok according to your calculations.  You should be about 1.5V from AVDD for 1.5mA.  See Figures 47 and 48 of the datasheet.  You will see a non-linearity as you approach the compliance voltage limit.

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Prodigy 100 points

    Yes, temperature remaining constant something about 25'C. It is linear error, i removed this error simply by adding calculated error. But i dont know what caused it.

    Some calculation that i have made.

    MSB - LSB RTD ('C) ADC out decimal format Calculated rtd resistance Calculated temperature Error Linearity
    181 17 172 1
    205 129 250 101
    228 166 63 201
    251 11 170 301
    16 190 221 401 1097437 246.9825945178 399.6735205672 1.3264794328 0.2410954246
    37 186 130 501 2472578 280.793074762 499.4324251426 1.5675748574 0.3558039944
    57 249 7 601 3799303 313.4131547407 599.0766211482 1.9233788518 0.33279807
    77 130 13 701 5079565 344.8908527065 698.7438230782 2.2561769218 0.3375560579
    96 84 246 801 6313206 375.2222839263 798.4062670204 2.5937329796

    Thank You Bob for fast response.

    Best regards

    Tom

     

     

  • 0 in reply to Lelumpolelum
    TI__Guru** 113765 points

    Hi Tom,

    The gain error trim in final test is adjusted after offset calibration.  Are you running a SELFOCAL?  If you think of the measurement of minus full-scale to plus full-scale with the center at zero, you would see the gain error appearing like a bow tie.  Fat at the ends and skinny in the middle.  If there is a little offset initially, then the error will shift up or down depending on the direction of offset.  This might be what you are seeing.

    Best regards,

    Bob B