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DAC 3283 dc offset correction differential or common mode?

Sefa Tanis
Prodigy 65 points

What is meant by the dc offset correction in the DAC 3283 datasheet?

Is it changing the differential offset voltages applied to the I and Q outputs?

Or the offset is just applicable to the dc bias levels (common mode level)?

We need to be able to change the differential I and Q levels to carry out a LO leakage calibration procedure for a double balanced quadrature mixer structure...

Thanks!

Sefa

  • 0
    TI__Guru* 77964 points

    Sefa,

    The DC offset circuit introduces static DC codes to the signal chain (shown in Figure 49). This static DC code shifts the distribution of output full-scale current from the positive leg to negative leg (and vice versa) to create differential DC voltage across the positive and negative leg. The shift in current can be calculated from the ratio of the DC offset code over the full scale code (2^16 = 65535) multiplied by the full-scale current (i.e. code/65535*full-scale current). The differential voltage value will depend on the load presented at the DAC output current source. 

    Assuming 20mA full-scale current. The output current for each leg will be evenly distributed at 10mA without any code offset. Introducing the offset code will increase the current of positive leg while decrease the current of negative leg (and vice versa depending on the sign of the code). 

    Most of TI IQ modulators will have about 40dBc of LO leakage level without DC offset correction. Changes to the differential DC voltage in the mV range can help trim the leakage level. The direction and level of trimming will be device dependent. 

    -KH