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ADS1278 - Getting 200Ksps out of it

Mehdi Mir
Prodigy 40 points
Other Parts Discussed in Thread: ADS1278

Hello, I am running an ADS1278 with a 25.6MHz Fclk. I am in frame sync mode which according to the data sheet makes the ADC a slave unit to the Frame Sync and Sclk. If I drive Sclk at 6.4MHz (1/4 Fclk) and Frame Sync at 100KHz (1/64 Sclk) am I getting 200Ksps? The Frame Sync now has 64 Sclk cycles inside 1 Frame Sync Period (high-low) good for 2 samples worth of data.

I am running in high speed mode (00)  with clk div = 1 and I get good data. I can run in high resolution mode and clkdiv = 1 and still get correct data. Am I running 200Ksps?

Also setting clkdiv = 0 in high res and high speed mode is not documented in the data sheet. Assuming I am truly getting 200Ksps by running the Sclk and Frame Sync at 6.4MHz and 100KHz will setting clkdiv = 0 better match the ADC to the sample rate? Or is it irrelevant in Frame Sync mode which makes the ADC a slave to me?

  • 0
    TI__Mastermind 43915 points

    Hi Mehdi,

    You are not able to get a 200kSPS data rate. The fclk and oversampling ratio control the data rate which runs independent of the interface. The Max data rate is 144kSPS with a 32.768MHz master clock (fclk). See table 3 in the data sheet for more information on the oversampling rate versus the master clock.

    Regards,

    Tony Calabria