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Please recommend MCU EVM to work together with ADS8363 EVM Board

Quan Xiong
Prodigy 40 points
Other Parts Discussed in Thread: ADS8363, AM1802, OMAP-L138

Hello,

I plan to use ADS8363 EVM board as the basis to build an sequential sampling system. This system will be able to work with mux and acquire around 64 channels, and the data rate from the ADS8363 through SPI interface is over 2 Mbps.

Please recommend an MCU EVM with small size and low power consumption (for this system will be a portable system), and have a tool-chain that not too difficult for a beginner.The MCU should have at least 2 SPI interface, because I need another SPI interface to communicate with wireless module.

I search for TI, AM1802 or OMAP-L138 might be a good choice. Please give me some information about them.

Thanks

  • 0
    TI__Guru**** 180751 points

    Hi Quan!

    Take a look at Figure 1 on page 9 of the ADS8363 data sheet, controlling both RD and CONVST (while maintaining the required SCLK edge relationships) is not easily accomplished with a traditional SPI interface.  This device is more suited to a multi-channel buffered serial port (McBSP) type interface or perhaps a state based controller such as an FPGA or CPLD.  The OMAP-L138 does have the McBSP interface, so that may be the best choice for your project.  I suggest you post this query in the OMAP forum as well and our experts there should be able to give you details on the available tool sets for that processor.

  • 0 in reply to Tom Hendrick
    Prodigy 40 points

    Hello, Tom,

    Thanks for your reply. I still have another question.

    Is it possible to find another ADC with standard SPI interface, which could meet the following requirements?

    1. standard SPI interface;

    2. at least 200k sample per second;

    3. 16 bits resolution

    Best regards

  • 0 in reply to Tom Hendrick
    Prodigy 50 points

    Hi Tom,

    I have the same problem than Quan. I must use the ads8363 and only have a simple SPI interface. I can controll the CONVST and RD seperately and found out, that the timing on CONVST is not that important. I can trigger a conversion by going high on CONVST even without switching the CLK on and the BUSY goes high imediately, stays there until I have switched on the CLK and 18 CLK cycles are over. So I hope the same will work with the RD but until now I had no success. Can you give me some advice here?

    Thanks!

  • 0 in reply to Sascha Koch
    TI__Guru**** 180751 points

    Hi Sascha,

    The CONVST input to the ADS8363 does not need a clock edge to be qualified.  It can 'pulse' high without the presence of the input clock.  The sample and hold switch opens up and BUSY goes high as you've already seen.  The conversion process only starts when you apply the SCLK as you noted. 

    The RD input however is a little different.  It actually needs to be validated with a falling SCLK edge.  Take a look at Figure 2 (on page 10 of the datasheet) and note the setup/hold times of RD against the falling clock edge.  This figure describes Full Clock mode but the same is try when running in half clock mode with CONVST and RD tied together.

  • 0 in reply to Tom Hendrick
    Prodigy 50 points

    I think I found a work-around. I can set the RD HIGH for more than one CLK. So I first set the RD HIGH, send 8 dumy-bits and then set RD to LOW. Works fine so far. At least I can write and read out the registers.