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ADC12D1800RB board LMX2531 PLL

levent tura
Prodigy 20 points
Other Parts Discussed in Thread: LMX2531

Hi everybody,

I work to write VHDL code to read ADC value form ADC chip. I recognized that, LMX2531 PLL configured by Cypress chip. Can you write me LMX2531 PLL chips register settings. Because I wrote all codes but PLL register settings.. Thanks a lot.

  • 0
    TI__Mastermind 44680 points

    Hi Levent

    The register writes to the LMX2531 are as follows (taken directly from the WaveVision 5 script for the ADC12D1800RB):

    <!-- 1.8 Gig - Internal Clock = 1800MHz April 22, 2010 -->
        <action_exec_seq seq="pll_wr" set_addr_cmd:all="0x840005"/>
        <action_exec_seq seq="pll_wr" set_addr_cmd:all="0x800005"/>
        <action_exec_seq seq="pll_wr" set_addr_cmd:all="0x8007f5"/>
        <action_exec_seq seq="pll_wr" set_addr_cmd:all="0x01048c"/>
        <action_exec_seq seq="pll_wr" set_addr_cmd:all="0x000ba9"/>
        <action_exec_seq seq="pll_wr" set_addr_cmd:all="0x028008"/>
        <action_exec_seq seq="pll_wr" set_addr_cmd:all="0x000307"/>
        <action_exec_seq seq="pll_wr" set_addr_cmd:all="0x280006"/>
        <action_exec_seq seq="pll_wr" set_addr_cmd:all="0x000004"/>
        <action_exec_seq seq="pll_wr" set_addr_cmd:all="0x34e623"/>
        <action_exec_seq seq="pll_wr" set_addr_cmd:all="0x568022"/>
        <action_exec_seq seq="pll_wr" set_addr_cmd:all="0x3e0001"/>
        <action_exec_seq seq="pll_wr" set_addr_cmd:all="0x3c0000"/>

    These will properly configure the PLL for 1800 MHz output.

    Please be aware that the specific LMX2531LQ1778E used on that board, along with the associated loop filter components will limit the possible output frequency to a narrow range. It is not possible to arbitrarily set the PLL output frequency to a different frequency.

    I hope this is helpful.

    Best regards,

    Jim B

  • 0 in reply to Jim Brinkhurst1
    Prodigy 20 points

    Thax a lot Mr. Jim,

    I have solved my problem. My problem was wrong M divider value. After resolving this problem, my vhdl program worked successfully. I can read 3.6Gs ADC value.