ADS1255 Input Impedance Reproducibility

Hi Dinesh,

Welcome to the TI E2E Forum! What is your application and what is the input signal that you are measuring?

I don't have specific information about input impedance variation, however, I believe it will be very severe. The input impedance measurement is an effective resistance that is really determined by the input bias current. Input bias current is typically dominated by the reverse biased ESD protection diodes in the device input. This current typically doubles every 10 deg C. Device-to-device there will also be a wide variation. Hence, this information is not characterized and provided in the data sheet.

In your application you could try to characterize and calibrate for this error, however, I do not think it will be worthwhile. In addition to just figuring out the input impedance of the ADC, you will also have to consider how your source responds to the small switching glitches on the ADC input (which in power applications is called a load transient). I would strongly advise using a buffer to reduce the resistor divider error and correct for the switching load transients.

The ADS1255's internal buffer does have a limited input voltage range, however you could add an external amplifier with the required input voltage range. What are your size and cost budgets? We could look for other alternatives or work-arounds such as the ADS1259 which does not have the internal buffer and costs less. The ADS1259, plus external buffer, may be able to meet your requirements.

Regards,
Chris

Hi Chris,

Thanks for your response. We are driving the ADS 1255 inputs using a THS4521 Op-amp. We have 300 Ohms on each leg between the op-amp and converter as part of an anti-aliasing filter.

The worst case for us is on ADC gain 4, where the input impedance correction is about 1.6%. If we know this correction to within about 5% we are probably ok (overall error ~0.1%), but it sounds from your post like this will not be the case.

Component cost is not a big issue for us, but we have boards designed and are hoping to figure this out without a board spin. Maybe that is not possible.

Hi Dinesh,

What is the input signal you are trying to measure? Also what is the bandwidth requirement and gain of the driving amplifier? If you have a schematic you can share with me, I would appreciate it! It would help me in recommending modifications that would use your current PCB layout.

You can design the amplifier to incorporate the anti-aliasing filter. Notice in the THS4521/ADS1278 example circuit below that the series resistor is inside the feedback network. This corrects for the voltage drop of the resistor divider formed by the anti-aliasing filter and ADC input impedance.

Do you have a preferred cutoff frequency for the anti-aliasing filter? I would like to help recommend how to design the following circuit for your application that will solve the design challenge you've described.

Regards,
Chris

Hi Chris,

Thanks for this suggestion. This is obvious in hindsight as a great solution to our problem!

At the moment we have a filter that looks like Figure 25 in the ADS1255 data sheet. The only difference is that we have added 0.1 uF caps to ground on AIN0 and AIN1. The nodes labeled VIN_P and VIN_N are the outputs of the THS4521.

We are currently trying the simple change of moving the 300 Ohm resistors inside the feedback network as you suggest. This is an easy cut-and-jumper and seems like the best solution in the long run. Assuming this works out, I expect this will be our solution.

If we decide we want to keep the filter outside the feedback, we are considering changing the resistors to 30 Ohms and increasing all the capacitors by a factor of 10. Do you have any comments on this solution?

Here's a little more background on our measurement: we are measuring the + and - levels of a square wave that runs at 250 Hz. The converter is running at 1 ksps. The basic measurement sequence is:

1. Positive voltage set.

2. Settle for 1 msec.

3. Acquire conversion.

4. Negative voltage set.

5. Settle for 1 msec.

6. Acquire conversion.

7. Back to step 1.

So our bandwidth requirement is dictated by having the signal settle in 1 msec. The bandwidth in the current design is probably about as low as we would want to go. (As it is if we have small jitter in the settling time we can see noise due to the RC time constant--smaller bandwidth would make this worse.)

Thanks for all your help.

Best, Dinesh

Hi Dinesh,

Scaling the RC components values is probably your simplest solution. I would recommend using C0G capacitors if you can. I know C0G's are typically larger than the same value X7R, but they have better linearity. I think the largest surface mount C0G capacitor is 10uF in a 1206 package. Also if you make the differential capacitor 10x bigger than the common-mode capacitors, it will help reduce errors from capacitor mismatching (see image below). 

Moving the 300 Ohm resistor inside the feedback network will be a little more challenging as it will require compensating the amplifer. You may have to add additional feedback. Here is an example to follow (note: the 10 Ohm resistors are not necessary, but we have seen a benefit from adding them):

Regards,
Chris