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Driving requirements for ADC128S102QML

Michael Ford

Prodigy 160 points

Other Parts Discussed in Thread: ADC128S102

I noticed when driving ADC128S102 on some previous designs the 30pf sampling capacitance is charged by one channel and dumped into next causing small amount of crosstalk if amplifier does not settle in time. Is this still the case. Seems the device could be designed to discharge this cap between samples (depending on the order of the internal switching).

over 12 years ago

0 Jason Seitz over 12 years ago

TI__Intellectual 2630 points

Michael,

Can you provide a few items so we can help determine your source of crosstalk:

- partial schematic of the ADC128 input circuitry including amp.

- scope plot of SPI bus (CSbar, SCLK, DIN, DOUT) . Especially interested in your sample rate.

- What level of cross talk do you see? Voltage expected vs. voltage acquired?

0 Vaibhav Patil1 over 11 years ago in reply to Jason Seitz

Prodigy 20 points

Hello,

I am working on ADC128S102 ADC first time, can any body share SPI drivers for the same ? I am interfacing this ADC with PIC24HJ Microcontroller

0 Michael Stout over 11 years ago in reply to Vaibhav Patil1

TI__Genius 16890 points

Hello,

Please see forum post 315822 at:

http://e2e.ti.com/support/data_converters/precision_data_converters/f/73/t/315822.aspx

Mike

0 Markus Roner over 10 years ago in reply to Jason Seitz

Prodigy 20 points

Hi Jason, have you been able to identify the exact reason for the crosstalk?