We are using the ADS5474EVM to sample an RF signal with almost no DC offset. The chip data sheet says "differential input range=2.2V pk-pk" and common mode voltage (self biased) = 3.1 V. With a VDD of 5V, the data sheet says Maximum RF input signal is -0.3V to +5.3V. However, looking at figure 19 of the data sheet for the ADS5474, it appears that an input signal with negative content (below the -0.3V) would just be shorted to ground. The transformer coupled input of the EVM converts a single sinusoid into two sinusoids with smaller amplitude offset by 180 degrees - which are then fed into the chip as AlN and AlN(bar), and the ADS5474 seems to know how to put sampled versions of these back together to give the sampled response of the entire signal. So - if the input is an ideal sinusoid, then by shifting one part by 180 degrees, we are essentially making what was negative positive. Thus we capture (+ half cycle) followed by (- half cycle, rectified) and this pattern repeats. So - will the ship or EVM board be damaged by a larger, zero DC offset signal? What if a sinusoid with +-5.3V were used (10.6V pk-pk)? The ADS5474 would ignore all data except that between 3.1V (the common mode voltage) and 5.3V. But would the negative portion of the signal damage the board? The EVM reduces signal levels - When I input a 1.05V pk-pk 250 MHz sine wave from an Agilent E4422B signal generator with no DC offset, and measure the signal at the pin of the SMA J11 (transformer or balun input) using a 50 ohm probe to an Agilent MSO6104A scope, I measure a sine wave with an amplitude of 682 mV. Board being power on or off makes no difference. Using a signal from other sources, show the same response. Why? The J11 input on the ADS5474EVM takes a single ended input in and converts it to differential [1V pk-pk in becomes 682 mV pk-pk after SMA, and becomes two, 362.5 mV signals 180 out of phase with each other at the output pins of the transformers - which is the input to the ADS5474 chip.] The ADS5474EVM data sheet does not list power input limitations, probably because it covers several chips. What is the largest signal we can safely input into J11, given the way the EVM board reduces signal level prior to the chip? If we can take 2.2V differential into the ADS5474 and we have two 180degrees out of phase signals, that means each can be 2.2V, right? And then working backwards we can have about 4.14V at the SMA pin J11, right? And with the way the board loads down our signal, we can feed J11 with 6.4Volts max. Is this correct? Our input signal is a modulated 250 MHz signal with almost no DC offset (max tens of mV).
Any suggestions would be welcomed - Thanks!
