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ADC output values

Other Parts Discussed in Thread: ADS6125

Hi,

I am not familiar with modern high speed ADC's so please excuse this post.

I am using an ADS6125 set to binary CMOS output to measure the amplitude of an incoming rf carrier (10 - 30MHz). I have set the ADC to use the internal reference and a gain of 6dB to give FSD with 1Vpp diff.

My incoming signal is ac coupled so biased around 0 so I was wondering how does the ADC report a negative going value?

in the past, when using simple ADC on 8 bit up's, I have added a dc bias so no input signal signal would read half scale. When I read in the datasheet I noted that if I use the internal reference then a dc bias is set at 1V and 2V I presume this is for the negative and positive phases is this doing the same thing? 

Ultiamley with no input signal should I expect an output of 0x000 or 0x800?

and with 1Vpp diff I should expect 0x1000?

thks and sorry for the idiot level post :)

  • Hello Tracy,

    A dc offset would still be required.  The ADC cannot accept a negative voltage below -0.3 and to my knowledge, that would still be registered as 0.  You would still use the same methods for setting up the ADC as you did in the past.

    I'm having some issues with viewing the data sheet now so I'm not sure if the internal reference you mention is for supplying a regular Vref for the ADC or an offset.

    Thanks,

  • Hi,

    Further, from the datasheet page 4 the VIC input common mode voltage should be 1.5V +/- 0.1V.   This is the voltage you would bias your AC coupled input signal to.  There is the output pin VCM that outputs the desired common mode voltage of 1.5V so you can use this to bias your input signal.  (VCM is an output if you are usign internal voltage reference mode - the usual case.)  Figures 96 and 97 in the datasheet shows an example of using VCM to bias the signal after AC coupling - in this case using a transformer for AC coupling.  Or Figure 98 showing the use of an amplifier and then using VCM to bias the signal after AC coupling.

    With VCM = 1.5V and the full scale set to 1.0V (because of the 6dB gain) then each side of the differential signal would swing between 1.25V and 1.75V.  When INP = 1.75V and INM = 1.25V then the output code would be positive full scale or all '1's.  When the INP = 1.25V and INM = 1.75V then the input code would be negative full scale or all '0's.

    Regards,

    Richard P.

  • Thks for the help just one further question if I was to swap the ADC output to 2's compliment would I get 

    0x7FF for INP = 1.75V and INM = 1.25V

    and

    0xFFF for INP = 1.25V and INM = 1.75V.

    If not what do I get?

  • I believe so.  The exact difference between the two formats is that the most significant bit is inverted.  To get from offset binary to 2's complement just invert the msb and then to convert back to offset binary just invert the msb again.

    Regards,

    Richard P.

  • 2's compliment.  Convert the hex number to binary, invert all digits, then add 1.