Other Parts Discussed in Thread: ADS6125
Hi,
I am not familiar with modern high speed ADC's so please excuse this post.
I am using an ADS6125 set to binary CMOS output to measure the amplitude of an incoming rf carrier (10 - 30MHz). I have set the ADC to use the internal reference and a gain of 6dB to give FSD with 1Vpp diff.
My incoming signal is ac coupled so biased around 0 so I was wondering how does the ADC report a negative going value?
in the past, when using simple ADC on 8 bit up's, I have added a dc bias so no input signal signal would read half scale. When I read in the datasheet I noted that if I use the internal reference then a dc bias is set at 1V and 2V I presume this is for the negative and positive phases is this doing the same thing?
Ultiamley with no input signal should I expect an output of 0x000 or 0x800?
and with 1Vpp diff I should expect 0x1000?
thks and sorry for the idiot level post :)