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ADS1198 Data Saturation Problem

Bo Xiao
Prodigy 20 points

1) I am able to send the start opcode to the chip.

2) I provide the SCLK to the chip at bursts of 152 cycles with delay between bursts.

3) The input is a slow varying sine wave or low amplitude dc voltage (5 mV).

However, I am unable to get the expected result from the Dout. It appears as soon the input signal becomes greater than 0V, the channel saturates, with no resolution in between.

Any help in debugging this problem would be much appreciated.

Bo

  • 0
    TI__Guru 66446 points

    Hi Bo,

    Thanks for your question.

    Are you seeing /DRDY falling edges at the expected rate? That would be the first thing I confirm.

    How do you have the inputs configured? Is the input signal coming from a function generator that shares the same ground as the ADC?

     

    Thanks,