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ADS5463: varying rate input clock to high-speed ADC

Jonathan Malton
Prodigy 40 points
Other Parts Discussed in Thread: ADS5463, ADS5463EVM

I need to convert a wide-bandwidth signal, using a rapidly varying sample clock.  The ADS5463 accepts a sample clock from 20MHz to 500MHz using a pipelined converter, with 3.5 cycles of latency, producing parallel DDR LVDS output.  My input sample clock will vary rapidly in frequency from about 50MHz to about 450MHz several times over a 10 microsecond period.  I'm assuming that the DDR output clock (DRY) will match the sample clock (at half the frequency), even though the sample being output from the converter is 3.5 cycles delayed. Can this device manage such a rapidly-changing sample clock?

  • 0
    TI__Expert 8895 points

    Hi,

    I had similar question from e2e the other day and tried to duplicate this with ADS5463EVM with TSW1400.

    I set 150~300MHz of sweeping clock as a clock source to ADS5463EVM and I set TSW1400 as "continuous capture mode" to capture single tone (Doppler spectrum). It looks working but I sometimes observed increased noise floor. I had to set 1ms of step time for sweeping because this is minimum step from signal generator.

    Thanks,

    KW

  • 0 in reply to KW Nam
    Prodigy 40 points

    Thanks for this insight.  I'm a bit concerned about increased noise in this situation too.  I'll be trying it shortly, when I can get equipment to simulate the source in a manner that's predictable.  I should have said that my "sample clock frequency will vary rapidly and continuously over a frequency spectrum from about 50MHz to about 450MHz several times over a 10 microsecond period".

    ~jm

  • 0 in reply to Jonathan Malton
    TI__Expert 8895 points

    The TSW1400 FPGA firmware uses a PLL to lock the data clock. If the clock is being rapidly changed, the FPGA PLL will struggle to keep up and adjust accordingly. And also PLL settings may need to be updated for different sampling rates. The noise floor could rise due to poor timing at the FPGA from this.

    I'll be trying to find another way to verify this without using TSW1400.

    Thanks,

    KW