This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Question: RDATA/RDATAC commands for ADS131E0x ADC

Hi,

I am confused how many SCLKs needed for CPU to send for the dummy write in order to read the ADC's data.

From the datasheet's Fig39 or Fig40, each converted data plus the status register's data are transferred on the SPI's DOUT line. Since the total bit number for the status registers are 16bit, I assume to read the convertered data from SPI interface, 16bit (for status registers) + 16bit (ADC's data) =32  SCLKs needed. This is for 16bit data conversion.

For 24bit conversion, it needs 16bit + 24bit = 40 SCLKs for each converted data.

If this is correct, this is conflict to the notes in the Fig 50 of the data sheet, which states "// Look for DRDY and Issue 24 + n x 24 SCLKs"

Thank in advance,

Ming