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ADS830 Tri-state outputs

Charles Jenkins
Prodigy 140 points
Other Parts Discussed in Thread: ADS830

The block diagram on the first page of the data sheet shows an output stage that has a tri-state capability but there is no control line for this unless it is tied to the clk and the timing circuitry.

Does the ADS830 have a tri-state output and what controls it?  What is the timing from the control?

  • 0
    TI__Mastermind 29220 points

    Hi,

    The ADS830 does not have the option to make the outputs high-impedance or tri-stated.  There is not a pin or mode to enable or disable the output drive.  I suspect that this was either an edit error in lifting the diagram from another data sheet that did offer output disable or that the author viewed this phrase as synonymous with single ended CMOS or TTL type outputs overlooking the fact that these outputs do not in fact offer the high-impedance state. 

    Regards,

    Richard Prentice