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FMC Data rate on adc12d1800rf evaluation board

Other Parts Discussed in Thread: ADC12D1800RF

We are currently designing and evaluation platform using a adc12d1800rf evaluation board connected to an Altera FPGA card through the FMC connector. The idea was to minimize the pin count and therefore use just a single channel with non-des, non-demux mode, so only 12 data bits. With this configuration, we were hoping to run the ADC at 1044.48 MHz. I can't find anything in the data sheet of the ADC or that of the evaluation board that suggests a limitation on the data rate of each port. However, I happen to know that the Virtex 4 has a maximum speed of 1 gbps on it's high speed ports. So in my opinion, a data rate of 1044.48 Msps from a single channel should be possible from the ADC but is in this case limited by the Virtex 4 on the evaluation board. Is this a correct observation? And if so, it might be useful to add this information in the datasheet of the evaluation board.

  • Greetings

    The ADC can operate in non-Demux mode at the full rated speed.

    Your observation is correct. Due to the 1 Gbps limition of the Virtex 4, the FPGA/firmware used on the reference board only supports operation in the Demux mode of operation. Therefore a minimum of 24 data pairs must be captured to acquire one channel (I or Q) of data. This is a limitation of the board only, not the ADC itself.

    I apologize that this is not clearly documented in the evaluation board user's guide or other collateral. I will see that it is added in the next revision of the user's guide.

    Best regards,

    Jim B