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ADS1247 Sleep mode

Other Parts Discussed in Thread: MSP430F6726, ADS1247, ADS1220, ADS1246

I am interfacing an ADS1247 with an MSP430F6726.  All looks good.  I have comms going and have good data to and from the device.  My question is in regards to sleep mode.  My product is very sensitive to power.  This chip was chosen due to the comparison to the internal converter and reference on the micro being better and with the integrated PGA and offset and gain registers being slightly better.  I am finding this to be a slight problem.  The specs were not completely clear when using the internal current source that Vref must be on in order to get the current output.  This is an extra 180uA that was not planned (Vref current).

This can be dealt with through the use of sleep mode.  However, I have just learned that the implementation of the sleep mode seems to be really wonky.  I found in this post:

http://e2e.ti.com/support/data_converters/precision_data_converters/f/73/p/75486/282700.aspx#282700

That mentions that the sleep command is only active the the duration of the time after the command is sent until the CS* pin is returned high (This is not mentioned anywhere in the datasheet!).  That makes absolutely no sense as the SPI interface is specifically designed to be used on multiple devices.  Because of this, I must dedicate a complete SPI interface to this chip alone (and for each subsequent ADC of this family in my design).  Please tell me this isn't so! I see no reason the sleep command shouldn't cause the device to go to sleep until I issue the wake command.  I only need to sample the analog value about once a second and have no problem waking the ADC up and allowing the Ref to stabilize before issuing a conversion command, but I Must be able to use the SPI during the remaining 950mS between conversions (Single conversion command at 20 SPS). 

I realize there is another option to use the START input pin to manually force the chip to sleep, but that wastes an IO pin just to make the analog portion (and REF) go to sleep?  That's a serious waste of resources when the proper way would be to just issue a software sleep command.

If I were to use the START pin, it looks like the CS* pin is ignored?  According to the timing diagram on page 33 of SBAS426G, CS* isn't even mentioned!  In this case, if I were to just keep this pin low, then pulse it (for at least tstart seconds), then wait for the time of the conversion (which is easy for me since I have a timer that measures how long I'm asleep (usually 0.250s but as fast as 0.062s) and just read back a result.  I'm also likely going to have to manually turn on Vref just before pulsing START and increase my DOR to 80 or 160 SPS just to get my data faster (and because I don't really need more than about 14-15bits of resolution).

So, I'm just looking for verification that there is no other way around this dependency on CS* for the sleep command than:

1. Dedicated SPI interface

2. Use of the START pin to manually control sleep state (and that this is not dependent on the CS* pin).

Thanks!

  • Hi Mark,

    There are a couple of ways to look at the SPI Sleep command.  One is the point of view that you mentioned, and the other is ensuring that the device actually wakes up if something should go wrong with the communications bus.  I prefer your point of view myself, but that is not the way the device was designed.

    The START pin is independent of the CS pin.  If START is low, you are in a power down state.  For the SPI, you don't have to have a dedicated bus.  You could add some glue logic, but again this requires another I/O pin, or the pin from another CS pin for another device on the same SPI bus.  What you do in this case is to keep SCLK low if another device is enabled.  An AND gate will work where one input is SCLK and another input (or group of inputs) is tied to CS.  The output of the AND gate goes to the ADS1247 SCLK pin.  The only time the SCLK is transmitted is if all other CS pins are high.

    Another option is to use the ADS1220.  This is a new device that will release in the next couple of weeks.  This is very similar to the ADS1247 with respect to function and will operate at a lower power.  You can see the preliminary information here:

    http://www.ti.com/product/ads1220

    Best regards,

    Bob B

  • Thanks for the quick response.  I have written code for and connected the START pin to "manually" control the power.  I think your concern for corrupt comms is exactly the reason the CS* pin resets the comms.  The data sheet mentions this.

    There is one fundamental operational principal that I have been missing.  That is that the chip is continuously converting as long as it's awake.  There is no "real" difference between the Read Data once command and the Read Data continuously (except the latter doesn't require a read command for each data point).  Once I came to this realization, the reading of data from the chip makes a lot more sense.  So, reading data once (RDATA) command does not read once and then go to sleep.  It reads the data from the data register once (regardless of if the converter is on or off as controlled by the START pin or the sleep command {with the CS* held low}).  Of course, the conversion speed is dependent on the sample rate (which ties in the accuracy, noise immunity, etc.).  Probably this is something that is perfectly clear to the ADC designer/documenter and is probably written in the data sheet, however, it wasn't until I understood it that the commands available started to make more sense.

    The way this became evident was due to a scope waveform that I saw that showed the reference didn't turn off until 100ms after I raised the START pin.  My device is set to 20SPS so each conversion should take about 50ms and the START pin was held high for about 60ms.  The code was performing a read once command.  I could clearly see the current reference charging the sensor circuit (filter caps, etc.) so I figured the resulting data would be inaccurate.  However, it wasn't.  The reason was that even though I had only read data once, it was actually being read after the START pin was lowered and then about 890ms later (the current main code loop time).  Thus, it was actually reading the second sample which was occurring well after the current reference was fully charged.  So, the "bad" sample (the one during the charge time) was thrown out and a new sample was made and stored automatically since, as I mentioned, the converter will convert continuously.

    So, using this method is what I will use in the final design.

    Thanks again for the help. It would be nice if there were some addendum to the data sheet that makes it clear that the sleep command is only active if the CS* line is held low.

  • I have also a question about ADS1247 sleep mode and START pin:

    On Page 33 of the data sheet is written:

    When the conversion completes, the ADS1246/7/8 automatically shuts shown down to save power. During shutdown, the conversion result can be retrieved; however, START must be taken high before communicating with the configuration registers. The device stays shut down until the START pin is once again taken high to begin.

    That means that the START pin must always be high when configuring the ADC (sending commands/write/read register)? And I can only read the conversion results when START is low?

    Or can I use the WAKEUP command and the start configuring the ADC1247? 

    Regards Felix

  • Felix,


    There is a section in the datasheet that tells you what SPI communication is active when the part is in sleep mode. On page 37, it says that the RDATA, RDATAC, SDATAC, WAKEUP and NOP commands all are available when the START pin is low. That means to configure the part, you'll need to have START high.

    As long as you have a good data coming out, you should be able to access the data regardless of the START being high or low.

    Note that if START is low, you won't be able to use the WAKEUP command to start up the device to write to it. START has a higher priority.


    Joseph Wu