ADS42JB69EVM Source Code

Mehmet Kaan Mutlu

Other Parts Discussed in Thread: ADS42JB69EVM

Hello,

I have an ADC (ADS42JB69EVM) and need to use it with KC705.It is needed to use JESD204B as interface. Because I'm not too experienced, at the beginning I tried to use example designs but they were written in Verilog (I know VHDL) and it was for share mod (I need receiver part). I tried to modify it but had some problems with it. Maybe my knowledge was not enough and because of it, I couldn't cope with it but now I want to hear some advices from you. Should I try to modify that codes carefully or should I write my own code? Should I modify also IP Core codes? What kind of problems did you have during this stage and how did you solve them? What do you advice for me to do? Hope to hear some advices..

Best regards,

Kaan

over 12 years ago

0 jim s over 12 years ago

TI__Guru* 91947 points

Kaan,

The interface is complicated and took us several months to develop, even with the help of Xilinx application engineers. We interfaced often with Xilinx and had to reference many Xilinx User's Guides and white papers. We did use the example files, but they required a lot of modifications. Using the Xilinx tool Chipscope was a big help as well. If you would like, send me your email and I can send you our project that works on our JESD204B Translation Card, which uses a KC705 FPGA. All of our firmware is Verilog based. I would highly recommend you learn Verilog and use our firmware as a starting point. You will have to obtain a Xilinx license for the JESD core to do any compiles on your own.

Regards,

Jim

0 Mehmet Kaan Mutlu over 12 years ago in reply to jim s

Prodigy 50 points

Hi Jim,

Thank you very much for your reply, I have been reading that user's guides for a month but still have some questions on my mind. I hope to be able to answer that questions by myself by the help of your project. My adress is mehmet.kaan.mutlu@gmail.com. As you adviced I also started to learn Verilog, I've licence for JESD core and I wish I will be better in the near future.

Have a nice day, regards

Kaan

0 fabu over 12 years ago in reply to jim s

Prodigy 230 points

Hi Jim,

I have another post requesting the source code of the verilog interface you have for ADS42JB69EVM. I contacted Richard Prentice and sent him a verification from Xilinx that we have the license. He said that he doesn't have the code and will notify the TI employee responsible. I haven't heard back from TI yet.

Could you kindly send me a private message so I can send you the license verification in order to obtain the verilog code?

Thanks!

0 jim s over 12 years ago in reply to fabu

TI__Guru* 91947 points

Fabu,

Send me your email info and I will send you the firmware.

Regards,

Jim

0 Richard Prentice over 12 years ago in reply to jim s

TI__Mastermind 29220 points

Fabu,

it took me a while to find it, but i did just send it.

Regards,

Richard P.

0 Muhammad Irfan Zeb Awan over 12 years ago in reply to Richard Prentice

Prodigy 20 points

Hi ,

We have bought JESD204B IP and planing to use Ti's ADS42JB69EVM Evaluation Module.

can you please send the FPGA firmware for KC705 board.

My email is irfanawan@msn.com

Regards

0 Muhammad Irfan Zeb Awan over 12 years ago in reply to Muhammad Irfan Zeb Awan

Prodigy 20 points

Hi,

We have bought Ti's ADS42JB69EVM Evaluation Module.board and Xilinx Jesd204B license.

Can you please send FPGA Firmware for KC705?

My email address is irfanawan@msn.com

Thank you

Irfan Awan

0 jim s over 12 years ago in reply to Muhammad Irfan Zeb Awan

TI__Guru* 91947 points

Irfan,

The firmware was generted using Xilinx ISE 14.3. I will send you a link to this firmware via your email. Xilinx is recommending all future designs to use the Xilinx Vivado design tool. The links below are from Xilinx and will direct you to a loop-back JESD204B project that was created using Vivado. In the near future, Xilinx will possibly have a Vivado based ADS42JB69-KC705 project.

Regards,

Jim

http://www.xilinx.com/member/jesd204_eval/

http://www.xilinx.com/member/jesd204_eval/jesd204_kc705_hwdemo.zip

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ADS42JB69EVM Source Code